Differential, high-speed, low power ECL-to-CMOS translator

Details Differential, high-speed, low power ECL-to-CMOS translator Differential, high-speed, low power ECL-to-CMOS translator

1991-08-06

1992-10-06

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072968, 307443, H03K 190175

Patent

active

051534657

ABSTRACT:
A high-speed lower power differential ECL to CMOS translator that includes a translator stage that converts differential ECL level input signals to intermediate CMOS level signals, a gain stage that converts the intermediate CMOS level signals to full CMOS level output signals and temperature independent reference circuitry connected to the translator stage for compensating for process variations that might otherwise effect the performance of the translator stage.

REFERENCES:
patent: 4841175 (1989-06-01), De Man et al.
patent: 4939393 (1990-07-01), Petty
patent: 5012137 (1991-04-01), Muellner
patent: 5019726 (1991-05-01), Guo

Affiliated with

Also associated with

Rating

Differential, high-speed, low power ECL-to-CMOS translator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Differential, high-speed, low power ECL-to-CMOS translator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Differential, high-speed, low power ECL-to-CMOS translator will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1191526