Differential front-end continuous-time sigma-delta ADC using...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C341S161000

Reexamination Certificate

active

11228113

ABSTRACT:
A multi-bit continuous-time sigma-delta analog-to-digital converter (ADC) has a differential input stage which receives an analog input signal current. A multi-bit feedback current digital-to-analog converter (IDAC) generates a multi-level feedback current depending on a digital feedback signal from a flash ADC. An integrator has a differential input that integrates the difference of the generated current by the multi-bit IDAC and the input signal current on a continuous-time basis. The input stage further comprises a first biasing current source and a second biasing current source which bias the input stage in a mid-scale condition. A first summing node connects to the first differential input line, a first differential input of the integrator and the first output branch. A second summing node connects to the second differential input line, a second differential input of the integrator and the second output branch. A set of chopping switches alternately connect the biasing current sources to the summing nodes in a first configuration and a second, reversed, configuration. The converter receives a modulator clock signal at a frequency FSand the chopping switches can operate at FSor a binary subdivision thereof. The integrator amplifier can also be chopper-stabilized.

REFERENCES:
patent: 5079550 (1992-01-01), Sooch et al.
patent: 6404367 (2002-06-01), Van der Zwan et al.
patent: 6486820 (2002-11-01), Allworth et al.
patent: 6577185 (2003-06-01), Chandler et al.
patent: 6753801 (2004-06-01), Rossi
patent: 6870495 (2005-03-01), Zadeh et al.
patent: 6909394 (2005-06-01), Doerrer et al.
patent: 6927717 (2005-08-01), Oprescu
patent: 2001/0022555 (2001-09-01), Lee et al.
patent: 2004/0145504 (2004-07-01), Doerrer et al.
patent: 2005/0275575 (2005-12-01), Motz
patent: 2006/0017595 (2006-01-01), Van Veldhoven et al.
PCT/US2005/033450 International Search Report, Jan. 2006.
Morrow, Paul et al, “A 0.18/spl mu/m 102dB-SNR mixed CT SC audio-band/spl Delta spl Sigma/ADC”, Solid-State Circuits Conference, 2005, IEEE, Feb. 6, 2005, pp. 178-179, 592.
Van der Zwan, E.J. et al, “A 0.2 mW CMOS/spl Sigma spl Delta/ modulator for speech coding with 80 dB dynamic range”, Solid-State Circuits Conference, 1996, IEEE, Feb. 8, 1996, pp. 232-233,451.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Differential front-end continuous-time sigma-delta ADC using... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Differential front-end continuous-time sigma-delta ADC using..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Differential front-end continuous-time sigma-delta ADC using... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3804783

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.