Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2002-04-11
2003-11-04
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S258000
Reexamination Certificate
active
06642793
ABSTRACT:
The above applications are commonly assigned to the assignee of the present invention. The disclosure of theses related patent applications are hereby incorporated by reference for all purpose as if fully set forth herein.
TECHNICAL FIELD OF THE INVENTION
The present invention is generally directed to electronic control circuitry and, more specifically, to a differential current mirror system and method that is capable of rejecting common mode signals.
BACKGROUND OF THE INVENTION
Current mirrors are commonly used as electronic control circuits in integrated circuits. When a reference current is provided as an input to a current mirror, the current mirror provides an output current that is identical (or proportional) to the reference current. The term “current mirror” reflects the fact that the output current is a “mirror image” of the input reference current.
The difference between two current input signals is referred to as the differential mode of the two current input signals. The average value of two current input signals is referred to as the common mode of the two current input signals. In many applications input current signals may be represented as a linear combination of a differential mode component and a common mode component of the current input signal. It is often desirable to amplify the differential mode component by a large gain factor while minimizing the amplification factor of the common mode component. Minimizing the amplification factor of the common mode component is referred to as “rejecting” the common mode component.
Prior art differential current mirrors are capable of providing two output currents that are identical (or proportional) to two input reference currents. However, prior art differential current mirrors are not capable of rejecting the common mode component of input current signals.
There is therefore a need in the art for a differential current mirror and method that is capable of rejecting common mode input current signals.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the prior art, it is a primary object of the present invention to provide a differential current mirror system and method for providing differential output current signals in which common mode current signals are rejected.
The present invention comprises a pair of diode connected transistors and a differential amplifier. In an advantageous embodiment of the present invention, the pair of diode connected transistors and the differential amplifier comprise MOSFET transistors. The pair of diode connected transistors comprise a first transistor and a second transistor coupled together. The differential amplifier comprises a third transistor and a fourth transistor in which the gate of the third transistor and a fourth transistor in which the gate of the third transistor receives a first input voltage signal from the drain of the first transistor, and in which the gate of the fourth transistor receives a second input voltage signal from the drain of the second transistor.
It is an object of the present invention to provide a differential current mirror with good common mode rejection of current signals.
It is another object of the present invention to provide a common mode rejection differential current mirror that provides good power supply rejection at the output.
It is still another object of the present invention to provide a common mode rejection differential current mirror with a mirroring ratio that is independent of process-voltage-temperature (PVT) variations in the electronic components of the system.
It is yet another object of the present invention to provide a common mode rejection differential current mirror that can operate at low voltages.
The foregoing has outlined rather broadly the features and technical advantages of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features and advantages of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they may readily use the conception and the specific embodiment disclosed as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.
Before undertaking the DETAILED DESCRIPTION OF THE INVENTION below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or,” is inclusive, meaning and/or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like; and the term “controller” means any device, system, or part thereof that controls at least one operation, such a device may be implemented in hardware, firmware or software, or some combination of at least two of the same. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior, as well as future uses of such defined words and phrases.
REFERENCES:
patent: 5343163 (1994-08-01), Linder et al.
patent: 5483194 (1996-01-01), Genest
patent: 5550510 (1996-08-01), Nagaraj
Maida Michael X.
Phanse Abhijit M.
National Semiconductor Corporation
Nguyen Khanh Van
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