Differential comparator and analog-to-digital converter comparat

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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Details

341155, 327 77, H03M 136

Patent

active

054164842

ABSTRACT:
A fully differential comparator includes a differential signal input, a differential reference input, and a differential signal output. Identical first and second gain stages are used in the differential comparator that each have a first single-ended input, a second single-ended input, and a differential output. The first single-ended inputs from the first and second gain stages form the differential signal input of the differential comparator. The second single-ended inputs from the first and second gain stages form the differential reference input of the differential comparator. The differential outputs of the first and second gain stages are cross-coupled to form the differential signal output of the differential comparator. The differential comparator can be used in conjunction with a conventional resistor string found in the front end of a flash ADC, but in a novel manner that prevents undesirable loading effects, as well as other problems associated with prior art single-ended comparators.

REFERENCES:
patent: 4907121 (1990-03-01), Hrassky
patent: 4990799 (1991-02-01), Weiss
patent: 5043599 (1991-08-01), Zitta
patent: 5065045 (1991-11-01), Mok
patent: 5072220 (1991-12-01), Petschacher et al.
patent: 5138318 (1992-08-01), Matsuzawa
patent: 5194866 (1993-03-01), Imaizumi
patent: 5264851 (1993-11-01), Yasuda

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