Differential column readout scheme for CMOS APS pixels

Details Differential column readout scheme for CMOS APS pixels Differential column readout scheme for CMOS APS pixels

2005-07-19

2005-07-19

Luu, Thanh X. (Department: 2878)

Radiant energy

Photocells; circuits and apparatus

Photocell controlled circuit

C250S208100, C348S245000

Reexamination Certificate

active

06919551

ABSTRACT:
The present invention provides an improved column readout circuitry and method of operation which minimizes substrate and other common mode noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output. This is accomplished by obtaining a differential readout of the reset signal and integrated charge signal from a desired pixel along with the reset signal and charge signal from a reference circuit. In this manner common mode noise can be minimized by a combination of signals from the desired and reference pixels in the sample and hold aspect of the column circuitry. In one exemplary embodiment of the invention, a 3T pixel arrangement is used. In another exemplary embodiment, a 4T arrangement is used. Additional exemplary embodiments provide differential column readout circuitry that can be used with any two signal sources.

REFERENCES:
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patent: 6204524 (2001-03-01), Rhodes
patent: 6222175 (2001-04-01), Krymski
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Brent Keeth, et al., “ DRAM Circuit Design; A Tutorial”; IEEE Solid-State Circuits Society, Chapter 3, pp. 69-103.
Iliana L. Fujimori, et al., “A 256×256 CMOS Differential Passive Pixel Imager with FPN Reduction Techniques”; 2000 IEEE International Solid State Circuits Conference, Feb. 7, 2000, pp. 106-107.

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