Differential clocking scheme in an integrated circuit having...

Details Differential clocking scheme in an integrated circuit having... Differential clocking scheme in an integrated circuit having...

2006-11-28

2006-11-28

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S296000, C327S298000, C326S041000

Reexamination Certificate

active

07142033

ABSTRACT:
A system for distributing a small signal differential signal to a circuit element. The system includes: a first converter configured to convert a first small signal differential signal to a first two phase full CMOS differential signal for input into the differential multiplexer; and a programmable driver circuit configured to boost an output current of the programmable driver circuit at selected frequencies and to convert two phase full CMOS differential signal outputs of the differential multiplexer to a second small signal differential signal.

REFERENCES:
patent: 5124571 (1992-06-01), Gillingham et al.
patent: 5164619 (1992-11-01), Luebs
patent: 5391942 (1995-02-01), El-Ayat et al.
patent: 5394443 (1995-02-01), Byers et al.
patent: 5397943 (1995-03-01), West et al.
patent: 5467040 (1995-11-01), Nelson et al.
patent: 5565816 (1996-10-01), Coteus
patent: 5742180 (1998-04-01), DeHon et al.
patent: 5850157 (1998-12-01), Zhu et al.
patent: 5907248 (1999-05-01), Bauer et al.
patent: 5917340 (1999-06-01), Manohar et al.
patent: 5999039 (1999-12-01), Holst et al.
patent: 6066972 (2000-05-01), Strom
patent: 6232806 (2001-05-01), Woeste et al.
patent: 6289068 (2001-09-01), Hassoun et al.
patent: 6310495 (2001-10-01), Zhang
patent: 6380788 (2002-04-01), Fan et al.
patent: 6421801 (2002-07-01), Maddux et al.
patent: 6433606 (2002-08-01), Arai
patent: 6489820 (2002-12-01), Humphrey et al.
patent: 6510549 (2003-01-01), Okamura
patent: 6633191 (2003-10-01), Hu
patent: 6650141 (2003-11-01), Agrawal et al.
patent: 6651237 (2003-11-01), Cooke et al.
patent: 6657474 (2003-12-01), Varadarajan
patent: 2001/0033188 (2001-10-01), Aung et al.
patent: 2003/0062949 (2003-04-01), Suzuki
patent: 1 363 210 (2003-11-01), None
patent: 2001 056721 (2001-02-01), None
U.S. Appl. No. 10/351,033, filed Jan. 24, 2003, Morrison et al.
U.S. Appl. No. 10/436,781, filed May 12, 2003, Kaviani et al.
U.S. Appl. No. 10/453,235, filed Jun. 12, 2003, Vadi et al.
U.S. Appl. No. 10/618,404, filed Jul. 11, 2003, Young.
U.S. Appl. No. 10/683,944, filed Oct. 10, 2003, Young.
U.S. Appl. No. 10/769,205, filed Jan. 29, 2004, Logue et al.
U.S. Appl. No. 10/792,055, filed Mar. 2, 2004, Wei.
U.S. Appl. No. 10/836,722, filed Apr. 30, 2004, Vadi et al.
U.S. Appl. No. 10/837,009, filed Apr. 30, 2004, Vadi et al.
U.S. Appl. No. 10/837,329, filed Apr. 30, 2004, Vadi et al.
Philips; “High-performance PECL Clock Distribution Family”; PCK111/PCK210/PCKEL14/PCKEP14; Oct. 2002; pp. 2.
Jim Lipman; “Growing Your Own IC Clock Tree”; EDN Access for Design, By Design; Mar. 14, 1997; downloaded from http://www.e-insite.net/ednmag/archives/1997/031497/06CS.htm; pp. 1-10.

Affiliated with

Also associated with

Rating

Differential clocking scheme in an integrated circuit having... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Differential clocking scheme in an integrated circuit having..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Differential clocking scheme in an integrated circuit having... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3697871