Differential clock recovery in packet networks

Details Differential clock recovery in packet networks Differential clock recovery in packet networks

2005-12-05

2009-02-17

Tran, Pablo N (Department: 2618)

Multiplex communications

Communication over free space

Repeater

C370S347000, C370S535000

Reexamination Certificate

active

07492732

ABSTRACT:
Where a common network clock is available at both a TDM receiver and a TDM transmitter which communicate via a packet network, differential clock recovery can be accomplished by matching the number of service clock pulses in a network reference clock period at the transmitter and receiver. In one embodiment the transmitter need only send a counter value from a counter that is clocked and reset, respectively, by the service clock and network reference clock, thereby allowing use of different types of oscillators, both analog and digital, to be implemented at the transmitter and receiver. The technique is also general enough to be applied in a wide variety of packet networks including but not limited to IP, MPLS and Ethernet. In an alternative embodiment, a faster derived network clock fdncdrives both the transmitter and receiver counters, which in turn are reset, respectively by the slower transmitter service clock fscand slower receiver service clock frc.

REFERENCES:
patent: 6980586 (2005-12-01), Ballinger
patent: 7010074 (2006-03-01), Nakamura
patent: 7203240 (2007-04-01), Kim et al.
patent: 2004/0114632 (2004-06-01), Yuuki et al.
patent: 2006/0245453 (2006-11-01), Bedrosian
patent: 2007/0097947 (2007-05-01), Aweya et al.
patent: 2007/0206643 (2007-09-01), Egan et al.
patent: 2007/0279408 (2007-12-01), Zheng et al.

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