Differential charge transfer sense amplifier

Communications: electrical – Digital comparator systems

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307238, 307279, 307291, 340173FF, G11C 706, G11C 1124

Patent

active

039493814

ABSTRACT:
A differential charge transfer amplifier which functions as a sensing and regenerating circuit responsive to binary information represented by the level of charge in a stored charge memory cell is disclosed. The sense amplifier includes a pair of dummy cells and bucket brigade amplifiers which are connected on either side of a dynamic latching circuit which includes a plurality of actuable gate devices, which may be field effect transistors. A bit/sense line of the array is divided into two equal sections which are respectively connected to either side of the sense amplifier. The operation of the amplifier is cyclic, including a precharge period, a sensing period, a rewrite period and a restore period, after which the amplifier is in its original state. A feature of the amplifier is that it consumes no d.c. power other than leakage and has high sensitivity due to a charge transfer feature. Also, during the operation of the circuit, energy remaining in one of the bit line sections after rewriting is utilized to pre-bias both bit line sections to an initial level. As a result, this allows better control of the precharge level on the bit/sense line and in so doing, the power requirements are substantially reduced. At the same time, a dummy cell is charged to the potential of the now balanced bit lines.

REFERENCES:
patent: 3760381 (1973-09-01), Yao
patent: 3771147 (1973-11-01), Boll et al.
patent: 3774176 (1973-11-01), Stein et al.

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