Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control
Utility Patent
1999-09-01
2001-01-02
Mis, David (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Particular error voltage control
C331S008000, C331S025000, C327S111000, C327S112000, C327S157000
Utility Patent
active
06169458
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a differential charge pump for use in integrated circuits. More specifically, a differential charge pump with reduced charge-coupling effects for use in integrated circuits such as a phase-lock loop is disclosed.
2. Description of Related Art
A phase-locked loop (PLL) generally comprises a phase detector, a low-pass loop filter, and a voltage-controlled oscillator (VCO). The VCO is an oscillator that produces a periodic wave form as an output signal, the frequency of which may be varied about some free-running frequency depending upon the value of the applied voltage. The free-running frequency is the frequency of the oscillator signal or the VCO output when the applied voltage is 0.
The phase detector receives an incoming signal and the output signal of the VCO and produces a phase detector output signal. The phase detector output signal represents the phase difference between the incoming and oscillator signals. The phase detector output signal is filtered through the low pass filter. The output of the low pass filter is the output of the PLL and the applied voltage to the VCO used to change the frequency of the VCO output. The closed-loop operation of the circuit maintains the VCO frequency locked to that of the incoming signal frequency.
If the applied signal of the VCO has the free-running frequency as an initial frequency, the PLL will acquire lock and the VCO will track the incoming signal frequency over some range, provided that the incoming signal frequency changes slowly. However, the loop will remain locked only over some finite range of frequency shift.
When the loop is operating in lock, the incoming signal and the VCO output signal fed to the phase comparator are of the same frequency. When the loop is trying to achieve lock, the output of the phase comparator contains frequency components at the sum and difference of the signals compared. The low-pass filter passes only the lower frequency component of the signals so that loop can obtain lock between incoming and VCO signals.
During lock, the output of the low-pass filter is the value needed to hold the VCO in lock with the incoming signal. The VCO then outputs a fixed amplitude wave signal at the frequency of the incoming signal. A fixed phase difference between the incoming and the VCO output signals to the phase comparator results in a fixed applied voltage to the VCO. Changes in the incoming signal frequency then results in change in the applied voltage to the VCO.
The limited operating range of the VCO and the feedback connection of the PLL circuit results in two frequency bands specified for a PLL: a capture range and a lock range. The capture range of the PLL is the frequency range centered about the VCO free-running frequency over which the loop can acquire lock with the input signal. The lock range of the PLL is generally wider than the capture range and is the range over which the PLL can maintain lock with the incoming signal once the PLL achieves capture. Within the capture-and-lock frequency ranges, the applied voltage drives the VCO frequency to match that of the incoming signal.
A PLL can be used in a wide variety of applications, including (1) modems, telemetry receivers and transmitters, tone decoders, AM detectors, and tracking filters; (2) demodulation of two data transmission or carrier frequencies in digital-data transmission used in frequency-shift keying (FSK) operation; (3) frequency synthesizers that provide multiples of a reference signal frequency (e.g. the carrier for the multiple channels of the citizen's band (CB) unit or marine-radio-band unit can be generated using a single-crystal-controlled frequency and its multiples generated using a PLL); and (4) FM demodulation networks for FM operation with excellent linearity between the input signal frequency and the PLL output voltage.
The PLL may also include a charge pump coupled between the phase detector and the low pass loop filter. The charge pump is a circuit block that serves as a source or sink of charge for the loop filter. In a typical implementation of the charge pump, two current sources, each in series with a switch are connected to the loop filter. The switches of the charge pump are typically controlled by the phase detector, which are updated to synchronize the output of the VCO to the incoming signal.
In a conventional charge pump, damp nodes of the charge pump are fixed to reference voltages and are independent of the voltages present on nodes on either side of a charge pump capacitor. As a result, during high speed operation of the charge pump, the voltages at the current source and sink nodes are alternately switched between a node on a corresponding side of the charge pump capacitor and a fixed reference voltage. This voltage switching characteristic modulates the magnitude of the currents through the charge pump and also leads to undesirable charge-coupling effect.
As the performance of the PLL is dependent in part upon the operating response time of the charge pump, it is desirable to provide a high speed charge pump with reduced charge-coupling effect.
SUMMARY OF THE INVENTION
A system and method for a differential charge pump with reduced charge-coupling effects for use in integrated circuits such as a phase-lock loop are disclosed. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device, a method, or a computer readable medium such as a computer readable storage medium or a computer network wherein program instructions are sent over optical or electronic communication lines. Several inventive embodiments of the present invention are described below.
In a preferred embodiment, the differential charge pump comprises a first branch, a second branch, and a charge device. The first branch includes a first current source and sink coupled to a power supply and ground, respectively, a first current steering device coupled between the first current source and sink, and a first buffer coupled to the first current steering device between a first charge node and a first damp node. The second branch includes a second current source and sink coupled to a power supply and ground, respectively, a second current steering device coupled between the second current source and sink, and a second buffer coupled to the second current steering device between a second charge node and a second damp node, each of the current steering devices being adapted to selectively steer current from at least one of the current sources to at least one of the current sinks. The charge device is coupled between the first buffer and the second buffer at the first and second charge nodes, the first and second buffers being adapted to vary voltages at the first and second damp nodes relative to voltages at the first and second charge nodes, respectively.
These and other features and advantages of the present invention will be presented in more detail in the following detailed description and the accompanying figures which illustrate by way of example the principles of the invention.
REFERENCES:
patent: 4636748 (1987-01-01), Latham, II
patent: 4695747 (1987-09-01), Latham, II
patent: 6011822 (2000-01-01), Dreyer
Shenoy Ravindra U.
Si Xiaomin
LSI Logic Corporation
Mis David
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