Differential cascode current switch (DCCS) logic circuit family

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307443, 307454, H03K 19086, H03K 19013, H03K 19092, H03K 1704

Patent

active

050755749

ABSTRACT:
The present logic circuit family is derived from the conventional DCCS logic circuit family. The logic circuit shown in the attached drawing is a six-input AND/NAND. It includes: a logic tree (41) comprised of bottom, middle, and top stages (44, 45, 46) cascoded and dotted at the tree output nodes (OUT, OUT) to perform a determined logic function (F, F). The top stage (46) includes a current switch (49) formed by a pair of input transistors (TX431, TX432) connected in a differential amplifier configuration. The base of one input transistor (TX431) on the left side of the tree is connected to the output of an AND gate, which consists of input diodes (D431, D432, . . . ) and resistor (RD41). True (IN PHASE) logic input signals (Z41, Z42, . . . ) are ANDed in this AND gate and a first elementary output signal, is available at the common emitter node (CN43) of the said differential pair. On the right side, additional inpout transistors (TX433, . . . ) are paralleled with the other input transistor (TX432) of the differential pair, so that the complementary (OUT OF PHASE) input signals (Z41, Z42, . . . ) that drive the transistors, are ORed to deliver a second elementary output signal, complementary to said first elementary output signal, on said common emitter node (CN43). Same principle applies at the first and second levels to build the bottom (44) and middle (45) stages.
The present invention allows to increase the number of logical inputs to be applied to a DCCS logic circuit, and in turn, the number of logic functions performed in the logic DCCS tree. As a result, an extended library of DCCS logic circuits may be obtained.

REFERENCES:
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patent: 4678942 (1987-07-01), Kanai et al.
patent: 4739194 (1988-04-01), Glasby et al.
patent: 4963767 (1990-10-01), Sinh
patent: 4994691 (1991-02-01), Naghshineh
patent: 4996445 (1991-02-01), Lin
IBM Technical Disclosure Bulletin, vol. 28, No. 1, Jun. 1985, pp. 254-256, "Checking a Clocked Differential Cascode Logic".

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