Differential analog-to-digital converter with low power consumpt

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341159, H03M 112

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active

058777180

ABSTRACT:
An analog-to-digital (A/D) converter capable of receiving a differential input for improved noise rejection and having two static resistive ladders for reducing power consumption. The resistive ladders are anti-parallel and have a high impedance, each dividing fixed voltages into a group of reference voltages. A first stage of comparators compares the positive signal of the differential input with each of the reference voltages from one of the resistive ladder, and the negative input signal with each of the reference voltages from the other resistive ladder. The outputs of the first stage of comparators are compared by a second stage of comparators to generate a group of binary outputs in parallel. An encoder converts the outputs of the second-stage comparators into a digital value. Decoupling capacitors are also provided to reduce the AC impedance of the resistive ladders.

REFERENCES:
patent: 4417233 (1983-11-01), Inoue et al.
patent: 4547763 (1985-10-01), Flamm
patent: 4612531 (1986-09-01), Dingwall et al.
patent: 4999630 (1991-03-01), Masson
patent: 4999631 (1991-03-01), Sugimoto
patent: 5164728 (1992-11-01), Matsuzawa et al.
patent: 5187483 (1993-02-01), Yonemaru
patent: 5204679 (1993-04-01), Jessner et al.
patent: 5210537 (1993-05-01), Mangelsdorf
patent: 5231399 (1993-07-01), Gorman et al.
patent: 5321402 (1994-06-01), Matsuzawa et al.
patent: 5355135 (1994-10-01), Redfern
patent: 5416484 (1995-05-01), Lofstrom
patent: 5420587 (1995-05-01), Michel
patent: 5436629 (1995-07-01), Mangelsdorf
patent: 5451952 (1995-09-01), Yamazaki et al.
patent: 5598161 (1997-01-01), Yamada et al.
patent: 5684486 (1997-11-01), Ono et al.
G. M. Yin et al., A High-Speed CMOS Comparator with 8-b Resolution, IEEE Journal of Solid-State Circuits, vol. 27, No. 2, pp. 208-211, Feb. 1992.
P. Sutardja et al., 55-mW 300-MHz Analog-Digital Converters Using Digital VLSI Technology, Sympo. Of Low Power Electronics, San Jose, CA., Oct. 95.

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