Differential amplifying circuit

Details Differential amplifying circuit Differential amplifying circuit

1983-01-31

1985-06-04

Mullins, James B.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

330253, 330260, 330 84, H03F 345, H03K 502

Patent

active

045217041

ABSTRACT:
A differential amplifying circuit includes a pair of main amplifying circuits (5a, 5b) each having at least three input terminals and at least one output terminal, and a pair of auxiliary amplifying circuits (6a, 6b) each having at least one input terminal. Complimentary inputs (D1, D1) are connected to the input terminals of said pair of auxiliary amplifying circuits (6a, 6b), the outputs (D2, D2) of the main amplifying circuits (5a, 5b) are connected as crossing feedback inputs to at least a pair of input terminals of said pair of main amplifying circuits (5a, 5b), the complimentary inputs (D2, D2) are also connected to the other at least one pair of input terminals, and the outputs of said auxiliary amplifying circuits (6a, 6b) are further connected to the further at least pair of input terminals.

REFERENCES:
IEEE Int'l. Solid-State Circuits Conf., 1976-Session XII: Memory 1.
Journal of Solid-State Circuits, vol. SC-13, No. 5, Oct. 1978, DSA 4K Static Ram.
Chin et al., "Low-Power Data Register", IBM Technical Disclosure Bulletin, vol. 15, No. 12, May 1973, pp. 3891-3892.

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