Differential amplifier with two long-tailed pairs of...

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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Details

C330S261000

Reexamination Certificate

active

06642787

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to amplifier circuit arrangements. In particular, although not exclusively, this invention relates to amplifier circuit arrangements for implementation in mobile radio transceivers, such as radiotelephones.
BACKGROUND OF THE INVENTION
A radio transmitter tends to constitute more of a drain on a mobile transceiver's battery than any other component. There is a continuing drive to improve the linearity, output power and noise figure of these transmitters whilst operating from low voltage supplies (often less than 3 V) and with low current consumption, even at frequencies of the order of 2 GHz.
Where voltage headroom is a concern, it is usual to use either the common-emitter amplifier circuit of
FIG. 1
or the long-tailed pair amplifier circuit of FIG.
2
. In each case, the use of open collector outputs
10
allows the use of an external inductor (not shown) connected between supply voltage and the output or outputs
10
to provide current to the collector of the or each transistor
12
. This can also enable the output signal swing to exceed the level of the voltage supply. The use of these external inductors and of current source inductors
11
provides the transistors
12
with a large proportion of the voltage supply, for use in providing the output signal.
Because the
FIG. 1
circuit has a single-ended output, only a simple impedance matching circuit is required. The
FIG. 2
differential output circuit allows higher maximum output power than the
FIG. 1
circuit but requires a more complicated impedance matching circuit when loaded by a filter with a single-ended input.
There are two primary sources of non-linearity in these amplifier circuits: the non-linearity of a base-emitter junction and the non-linearity of a collector-base capacitance. The base-emitter junction non-linearity is often mitigated through the use of a resistor or an inductor connected in series with the emitter to provide emitter degeneration. The collector-base capacitance non-linearity is more difficult to mitigate. Since the scale of each of the output transistors
12
is high, the input impedance is relatively low and very non-linear. To improve linearity, the amplifier circuit would have to be driven by a signal source having a very low output impedance. However, this would cause relatively high current levels to be consumed, especially at high frequencies. Cascode circuits are not practical where reasonably high output power levels are required from a low- voltage power supply. Linearity is particularly important in CDMA transmitters.
SUMMARY OF THE INVENTION
According to this invention, there is provided an amplifier circuit arrangement comprising first and second long-tailed pairs of transistors, wherein a differential input signal is received between the base electrode of a first transistor of the first pair and the base electrode of a first transistor of the second pair, the base electrodes of second transistors of the said pairs are coupled together and to a source of bias, and the collector electrodes of the transistors of the pairs are cross-coupled to provide a differential output.
Preferably the source of bias is a high impedance source of bias.
The emitter electrodes of the transistors of each pair are preferably connected together by a respective inductor. This provides series degeneration for the input transistors which is noiseless and which does not impinge on the voltage supply. The Miller effect is also reduced and, because the input impedance of the transistors is real, impedance matching is made easier. The inductors are preferably mutually coupled. This allows space saving on the chip on which the arrangement is provided, and provides improved symmetry in the differential output.
A capacitor may be connected between the base electrode of the first transistor and the collector electrode of the second transistor of each pair. This feature improves the linearity characteristics.
According to a second aspect of this invention, there is provided an amplifier circuit arrangement comprising first to fourth transistors each having base, collector and emitter electrodes, wherein a differential input signal is received between the base electrodes of the first and fourth transistors, the base electrodes of the second and third transistors are connected together and to a source of bias, the emitter electrodes of the first and second transistors are connected to form a long tailed pair, the emitter electrodes of the third and fourth transistors are connected to form a long tailed pair, the collector electrodes of the first and third transistors are connected together and to a first side of a differential output, and the emitter electrodes of the second and fourth electrodes are connected together and to a second side of the differential output.
Preferably the source of bias is a high impedance source of bias.
In accordance with another aspect of the invention, there is provided a method of amplifying a differential input signal, comprising applying the signal between two long-tailed pairs of transistors, one of which is connected to one of the input lines and the other of which is connected to the other of the input lines, each long-tailed pair generating a respective differential output signal, biasing the commonly-coupled base electrodes of the two transistors which are not connected to receive the input signal directly from a high impedance source, and combining the two differential output signals to form a combined differential output signal.
Embodiments of this invention will now be described, by way of example, with reference to the accompanying drawings.


REFERENCES:
patent: 4267516 (1981-05-01), Traa
patent: 4369410 (1983-01-01), Fenk
patent: 4381487 (1983-04-01), Erickson
patent: 4634995 (1987-01-01), Nakayawa et al.
patent: 5196805 (1993-03-01), Beckwith
patent: 5465072 (1995-11-01), Atarodi
patent: 0 600 141 (1994-06-01), None
patent: 2 462 817 (1981-02-01), None
patent: 59-44112 (1984-03-01), None

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