Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2011-03-15
2011-03-15
Nguyen, Khai M (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S143000, C341S155000
Reexamination Certificate
active
07907076
ABSTRACT:
A differential amplifier circuit is provided with an operational amplifier and a modulator. The operational amplifier includes a feedback capacitance, and amplifies an analog input signal and outputs an amplified analog output signal. The modulator is connected to a virtual ground point of an input terminal of the operational amplifier, and the modulator switches between a pair of inputted analog differential signals to alternately select one of the analog differential signals based on a predetermined modulation control signal, and outputs a selected analog differential signal. The differential amplifier circuit alternately folds and amplifies the analog input signal within a predetermined input level limit range to generate a signal having different polarities sequentially so as to start from a voltage potential of the virtual ground point at a timing of the modulation control signal. In addition, an converter apparatus is provided with the differential amplifier circuit.
REFERENCES:
patent: 5030954 (1991-07-01), Ribner
patent: 5068659 (1991-11-01), Sakaguchi
patent: 5323158 (1994-06-01), Ferguson, Jr.
patent: 7015841 (2006-03-01), Yoshida et al.
patent: 7098827 (2006-08-01), Motz
patent: 7248200 (2007-07-01), Komuro et al.
patent: 7301399 (2007-11-01), Yoshida et al.
patent: 7336123 (2008-02-01), Yoshida et al.
patent: 7538705 (2009-05-01), Deval et al.
patent: 7551110 (2009-06-01), Tsyrganovich
patent: 7589587 (2009-09-01), Yoshida et al.
patent: 2005-223888 (2005-08-01), None
patent: 2006-157262 (2006-06-01), None
patent: 2006-279377 (2006-10-01), None
patent: 2006-304035 (2006-11-01), None
patent: 2008-67050 (2008-03-01), None
Takanori Komuro et al. “ADC Architecture Using Time-to-Digital Converter”, Technical Papers C of the Institute of Electronics, Information and Communication Engineers, vol. J90-C, No. 2, pp. 125-133, issued by The Institute of Electronics, Information and Communication Engineers, Feb. 2007.
Yoshikazu Nitta et al., “High-Speed Digital Double Sampling with Analog CDS on Column Parallel ADC Architecture for Low-Noise Active Pixel Sensor”, Proceedings of 2006 IEEE International Solid-State Circuits Conference (ISSCC 2006), Session 27, Image Sensors, 27.5, pp. 500-501, in San Francisco, U.S.A., Feb. 5-9, 2006.
Y. Arai et al. “A CMOS Time to Digital Converter VLSI for High-Energy Physics”, Digest of Technical papers of 1988 Symposium on VLSI Circuits, in Tokyo, Japan XI-3, pp. 121-122, Aug. 1988.
M. Lee et al., “A 9b, 1.25ps Resolution Coarse-Fine Time-to-Digital Converter in 90nm CMOS that Amplifies a Time Residue”, Digest of Technical papers of 2007 Symposium and VLSI Circuits, in Kyoto, Japan, No. 16-4, pp. 168-169, Jun. 2007.
T. Yoshida et al., “A 1V Low-Noise CMOS Amplifier Using Autozeroing and Chopper Stabilization Technique”, IEICE Transactions on Electrons, The Institute of Electronics, Information and Communication Engineers (IEICE), vol. E89-C, pp. 769-774, Jun. 2006.
Gotoh Kunihiko
Iwata Atsushi
Masui Yoshihiro
Yoshida Takeshi
Nguyen Khai M
Semiconductor Technology Academic Research Center
Wenderoth , Lind & Ponack, L.L.P.
LandOfFree
Differential amplifier circuit amplifying differential... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Differential amplifier circuit amplifying differential..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Differential amplifier circuit amplifying differential... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2700676