Differential amplifier circuit

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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307200B, 307279, 307DIG3, 365204, 365205, H03K 520, G11C 706, H03K 3353, H03K 3286

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active

041503112

ABSTRACT:
A differential type amplifier circuit for use as a sensing amplifier in a memory circuit having a first stage amplifier and a second stage differential type amplifier. The first stage amplifier includes a pair of amplification circuits, the inputs of which are selectively clamped to a predetermined potential. The first stage amplifier functions to amplify low level differential input signals and these amplified signals are applied to the second stage amplifier, the amplified level of the input signals being sufficient to operate the second stage amplifier irrespective of changes in the threshold voltage of the second stage amplifier. Selectively clamping the inputs of the first stage amplifier to a predetermined potential allows the first stage amplifier to accurately amplify the low level input signals due to the fact that the threshold voltage of the first stage amplifier cannot vary from the predetermined potential. Therefore the entire differential sensing amplifier operates free of any changes in amplifier threshold voltage.

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patent: 4081701 (1978-03-01), White, Jr. et al.
Chu et al., "Low-Power, High-Speed Sense Latch", IBM Tech. Discl. Bull.; vol. 17, No. 9, pp. 2582-2583, 2/1975.
Rock, "Threshold Compensated Fet Latch Circuit", IBM Tech. Discl. Bull.; vol. 18, No. 11, pp. 3593-3594, 4/1976.
Barsuhn et al., "Semiconductor Storage Circuit Utilizing Two Device Memory Cells", IBM Tech. Discl. Bull.; vol. 18, No. 3, pp. 786-787, 8/1975.

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