Differential absolute equalization measurement circuit

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Phase comparison

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324 83A, G01R 2300, G01R 2312

Patent

active

044045204

ABSTRACT:
A circuit for measuring the Differential Absolute Delay Equalization between two data signals (each signal consisting of a data stream and its associated clock) is provided. The circuit generates an equalization error signal which is a composite of error signal and a pedestal voltage. The circuit also generates a replica of the pedestal voltage by taking the algebraic summation of the output of the comparison circuit and the complement of the output of the comparison circuit. The equalization error is the difference between the error signal and the replica pedestal voltage.

REFERENCES:
patent: 3329895 (1967-07-01), Lenz
patent: 3391343 (1968-07-01), McCurdy
patent: 4017801 (1977-04-01), Riedel
patent: 4103141 (1978-07-01), Wristen
patent: 4155050 (1979-05-01), Nichols
patent: 4195333 (1980-03-01), Hedel
Skilling, Hugh, "Electrical Engineering Circuits", John Wiley and Sons, Inc., 1957, pp. 410-412.
National Semiconductor TTL Data Book, National Semiconductor Corp., pp. 1-2 and 1-10, 1976.
Differential Delay Measurement Using Two Bit Error Measuring Test Sets, Internal Publication of Rockwell Intl., 5/78.

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