Different numbers of bits per cell in non-volatile memory...

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

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C365S185170

Reexamination Certificate

active

11037153

ABSTRACT:
A method of manufacturing a non-volatile flash memory device, including setting a first number of bits stored per cell for at least one first cell less than a second number of bits stored per cell for at least one second cell such that the setting permanently fixes the first number and the second number prior to shipping the device for use. Preferably the setting is based on predicted reliabilities of the cells. Preferably, the predicted reliability of the first cells is less than the predicted reliability of the second cells. Preferably, the setting is based on respective locations within the device of the first cells and the second cells. Preferably, the setting is based on respective word lines connecting to the first cells and the second cells.

REFERENCES:
patent: 5930167 (1999-07-01), Lee et al.
patent: 6331951 (2001-12-01), Bautista et al.
patent: 6456528 (2002-09-01), Chen
patent: 6493266 (2002-12-01), Yachareni et al.
patent: 6717847 (2004-04-01), Chen
patent: 6807106 (2004-10-01), Gonzales et al.

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