Dielectrically isolated substrate and semiconductor device using

Fishing – trapping – and vermin destroying

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357 43, 357 48, 357 50, 437 62, H01L 2702, H01L 2704, H01L 2712, H01L 21302

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050499688

ABSTRACT:
A dielectrically isolated substrate comprises a first semiconductor wafer, a second semiconductor wafer bonded on the first semiconductor wafer with a first insulating layer interposed therebetween, a semiconductor layer formed on the second semiconductor wafer, a first groove formed in the semiconductor layer and the second semiconductor wafer so as to reach the first insulating layer, thereby isolating the semiconductor layer and the second semiconductor wafer and a second insulating layer formed on the side face of the first groove or embedded in the first groove. In this dielectrically isolated substrate, a high breakdown voltage element and a low breakdown voltage element are formed in a region isolated by the first groove.

REFERENCES:
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patent: 4261003 (1981-04-01), Magdo et al.
patent: 4546370 (1985-10-01), Curran
patent: 4725561 (1988-02-01), Haond et al.
patent: 4851078 (1989-07-01), Short et al.
patent: 4897362 (1990-01-01), Delgado et al.
Patent Abstracts of Japan, vol. 9, No. 169 (E-328) [1982], Jul. 13, 1985; & JP-A-60 42 844 (Nippon Denki K.K.); Mar. 7, 1985.

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