Dielectrically isolated substrate and semiconductor device using

Details Dielectrically isolated substrate and semiconductor device using Dielectrically isolated substrate and semiconductor device using

1995-03-01

1996-04-30

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including high voltage or high power devices isolated from...

257506, 257513, 257520, 257777, 257140, H01L 2900

Patent

active

055127746

ABSTRACT:
A dielectric isolation substrate comprises a first semiconductor wafer, a second semiconductor wafer bonded on the first semiconductor wafer with a first insulating layer interposed therebetween, a semiconductor layer formed on the second semiconductor wafer, a first groove formed in the semiconductor layer and the second semiconductor wafer so as to reach the first insulating layer, thereby isolating the semiconductor layer and the second semiconductor wafer, and a second insulating layer formed on the side face of the first groove or embedded in the first groove. In this dielectric isolation substrate, a high breakdown voltage element and a low breakdown voltage element are formed in a region isolated by the first groove.

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patent: 4725561 (1988-02-01), Haond et al.
patent: 4851078 (1989-07-01), Short et al.
patent: 4860081 (1989-08-01), Cogan
patent: 4879584 (1989-11-01), Takagi et al.
patent: 4897362 (1990-01-01), Delgado et al.
patent: 4900689 (1990-02-01), Bajor et al.

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