Dielectrically isolated substrate and method for manufacturing t

Details Dielectrically isolated substrate and method for manufacturing t Dielectrically isolated substrate and method for manufacturing t

1996-08-30

1998-04-14

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

257510, 257519, 257647, H01L 2900

Patent

active

057395756

ABSTRACT:
Element isolation technique for LSIs having a fine pattern of sub-micron class or finer. A high strained region doped with impurities at a high concentration is formed under, and remote from, a buried insulating material (dielectrics) layer for element isolation. With this buried dielectrics element isolation (BDEI) structure, since the high strained layer exists just under the buried dielectrics layer, crystal defects generated near the buried dielectrics layer due to strain caused by a difference of thermal expansion coefficient between a semiconductor layer and the buried dielectrics layer, are moved toward the high strained layer. Accordingly, the crystal defects do not reach an active region where active elements are formed, so that leakage current in the p-n junction formed in the active layer can be advantageously reduced.

REFERENCES:
patent: 4506435 (1985-03-01), Pliskin et al.
patent: 5250837 (1993-10-01), Sparks
patent: 5574299 (1996-11-01), Kim

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