Dielectrically-isolated integrated circuit complementary transis

Details Dielectrically-isolated integrated circuit complementary transis Dielectrically-isolated integrated circuit complementary transis

1978-12-20

1980-11-04

Larkins, William D.

357 13, 357 44, 357 58, 357 89, H01L 2704

Patent

active

042323282

ABSTRACT:
Integrated circuit complementary transistors for high voltage switching applications are fabricated in separate dielectrically-isolated pockets (12), (14) of high resistivity silicon, supported in a conductive medium (11) such as polycrystalline silicon, using surface adjacent conductivity type zones constituting emitter (19), (23), base (16), (20) and collector zones (17), (21). In one embodiment using high resistivity (75-300 ohm cm) silicon, referred to as .pi. material, for the material of the pocket, one transistor is a PN.pi.P device, and the other is an NP.pi.N. In the PN.pi.P the reverse-biased base-collector pn junction is the interface between the N base zone (16) and the .pi. portion (12) of the collector zone. In the NP.pi.N transistor the base-collector junction is the interface between the lightly doped .pi. extension (14) of the base zone (20) and the N collector zone (21). A connection (32) is provided to the conductive substrate to enable application of a suitable potential thereto.

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Chang et al., IBM Technical Disclosure Bulletin, vol. 11, No.12, May 1969, pp. 1653-1654.

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