Dielectrically-isolated integrated circuit

Details Dielectrically-isolated integrated circuit Dielectrically-isolated integrated circuit

1997-02-28

1999-10-05

Graybill, David

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Substrate dicing

438 68, 438114, 438458, 438460, 438465, H01L 21302

Patent

active

059637854

ABSTRACT:
In a semiconductor integrated circuit consisting of a plurality of semiconductor chips each having a plurality of islands, two or more bonding wires each having different potential are connected to bonding pads formed on the surface of semiconductor chips. The islands are isolated by a dielectric isolation region comprising polysilicon film and isolation film formed in an isolation groove. The polysilicon film is exposed at a dicing line region around the semiconductor chip and a surface of the polysilicon film is made highly resistive. If two or more bonding wires come into contact with the polysilicon film exposed at a peripheral region of the semiconductor chip to cause short circuit, parasitic conductance does not occur between two or more bonding wires because the peripheral region of the semiconductor chip has high resistivity, whereby variation in characteristics of the semiconductor integrated circuit can be suppressed.

REFERENCES:
patent: 4364078 (1982-12-01), Smith et al.
patent: 5543365 (1996-08-01), Willis et al.

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