Patent
1979-03-14
1980-12-30
Larkins, William D.
357 52, 357 54, 357 58, 357 59, H01L 2704
Patent
active
042426979
ABSTRACT:
A structure for achieving closely spaced high voltage devices in integrated circuits. The devices are formed in single crystalline tubs (11) in a polycrystalline substrate (10). In order to prevent the potential of the substrate from causing breakdown of the devices, there is included between the single crystalline tubs and the polycrystalline substrate a semi-insulating layer (13) which has trapping states capable of taking on charge from the single crystalline region. The shielding provided by the semi-insulating layer permits the surface regions of the device to be made closer to the polycrystalline substrate and the tubs to be made more shallow.
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Berthold Joseph E.
Hartman Adrian R.
Shackle Peter W.
Bell Telephone Laboratories Incorporated
Birnbaum Lester H.
Larkins William D.
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