Dielectric structure for anti-fuse programming element

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

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257 50, 257209, 257529, H01L 2904, H01L 2710, H01L 2900

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active

055214231

ABSTRACT:
An antifuse element suitable for use in FPGA. When a device is miniaturized to reduce the write voltage in an antifuse element and as the film thickness of the antifuse dielectric film is being reduced, the dielectric breakdown voltage is greatly variable due to the irregularity of the underlying metal. If the dielectric film is formed by a metal oxide having a relatively high specific permitivity without changing its parasitic capacity as compared to the prior art, the film thickness of the dielectric film can be increased in comparison with oxide and nitride films formed according to the prior art. The irregularity of the underlying metal can be reduced by coating it with a metal nitride or TiB film or TiC film. To equalize the dielectric breakdown voltage, another insulation film having a film thickness such that the direct tunnel conduction is dominant is formed below the metal oxide. To reduce the irregularity of the metal surface and to reduce the resistance after dielectric breakdown, an amorphous silicon layer is deposited before the metal oxide is deposited thereover to form a laminated film.

REFERENCES:
patent: 4488262 (1984-12-01), Basire et al.
patent: 5070384 (1991-12-01), McCollum et al.
patent: 5166556 (1992-11-01), Hsu et al.
David K. Y. Liu, et al. "Scaled Dielectric Antifuse Structure for Field-Programmable Gate Array Applications," IEEE Electron Device Letters, vol. 12, No. 4, Apr. 1991.
Simon S. Cohen, et al. "A Novel Double-Metal Structure for Voltage-Programmable Links," IEEE Electron Device Letters, vol. 13, No. 9, Sep. 1992.

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