Dielectric stack without interfacial layer

Details Dielectric stack without interfacial layer Dielectric stack without interfacial layer

2005-03-01

2005-03-01

Smith, Brad (Department: 2824)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C257S528000, C257S295000

Reexamination Certificate

active

06861728

ABSTRACT:
A method of forming a dielectric stack device having a plurality of layers comprises the steps of providing a silicon substrate, forming a metal-oxide layer on a silicon oxide layer which is formed on the silicon substrate, and performing an annealing with respect to the metal-oxide layer and the silicon oxide layer until a silicate layer is formed to replace the metal-oxide layer and the silicon oxide layer is removed, wherein the annealing is performed at a temperature between about 800° C. and about 1000° C. for a time period between about 1 second and about 10 minutes. After forming the silicon oxide layer on the silicon substrate, the metal-oxide layer may be deposited on the silicon oxide layer. Alternatively, the metal-oxide layer may be deposited on the silicon substrate, and the silicon oxide layer grows between the metal-oxide layer and the silicon substrate. The metal-based oxide is preferably an Yttrium-based oxide.

REFERENCES:
patent: 6307225 (2001-10-01), Kijima et al.
patent: 6521911 (2003-02-01), Parsons et al.
patent: 20020187644 (2002-12-01), Baum et al.
Parsons et al. “Ytterium Silicate formation on silicon: Effect of preoxidation and nitridation on interface reaction kinetics” Oct. 2000, Applied Physics Letters vol. 77 no 15 p 2385-7.

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