Dielectric pattern

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

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Details

257759, 257760, 257642, H01L 2928, H01L 21321

Patent

active

059593610

ABSTRACT:
A dielectric pattern. On a substrate having a metal wiring layer formed thereon, a first dielectric layer and a first masking layer are formed. A cap insulation layer is formed on the masking layer. The first dielectric layer, the first masking layer and the cap insulation layer are penetrated through by a first opening. A second dielectric layer and a second masking layer are formed on the cap insulation layer. The second dielectric layer and the second masking layer are penetrated through by a second opening. The first and the second openings are contiguous without intermittence.

REFERENCES:
patent: 5479054 (1995-12-01), Tottori
patent: 5585673 (1996-12-01), Joshi et al.
patent: 5616959 (1997-04-01), Jeng
patent: 5625231 (1997-04-01), Huang et al.
patent: 5763954 (1998-06-01), Hyakutake

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