Dielectric layer of first interconnection for electronic semicon

Fishing – trapping – and vermin destroying

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437231, 437238, 437978, H01L 21033

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050455044

ABSTRACT:
A dielectric layer of first interconnection for electronic semiconductor devices, specifically CMOS circuits, comprises a first thickness of tetraethylorthosilicate which is overlaid by a layer of self-planarizing siloxane. That layer provides a surface structure which is permissive of the subsequent conventional masking and electric contact attaching steps.

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patent: 4806504 (1989-02-01), Cleeves
G. De Graaf et al., "An Investigation of Advanced First Dielectric Planarisation Techniques . . . ", V--MIC Conf. IEEE, Jun. 13-14, 1988, pp. 357-365.
S. M. Sze, VLSI Technology, McGraw-Hill Book Co., New York (1983), pp. 107-109.

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