Dielectric layer including silicalite crystals and binder...

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Reexamination Certificate

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C524S847000, C524S588000, C524S858000, C524S859000, C428S450000, C423S335000, C427S387000, C427S397700

Reexamination Certificate

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06329062

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to the fabrication of dielectric layers on semiconductor devices, and more specifically to methods for forming dielectric layers from small silicalite crystals bound together with a binder to produce a low dielectric constant material and to the composition formed thereby.
BACKGROUND
Microelectronic integrated circuits based on patterned semiconductor materials are continuing to evolve towards devices with an extremely high density of circuit elements per unit volume. As the features of these devices are reduced to smaller sizes, the performance of the materials that constitute the device will critically determine their success. One specific area in need of advancement is the electrical insulator used between the wires, metal lines, and other elements of the circuit. As the distances between the circuit elements become smaller, there will be increased problems due to capacitive coupling (crosstalk) and propagation delay. These difficulties can be avoided by preparing the circuit using an insulating material that possesses a dielectric constant as low as possible. It has been conventional to use dense materials such as silicon dioxide, silicon nitride, and cured silsesquioxanes as insulators. However, the dielectric constants of these materials range from 3.0-7.0 which will not be adequate for future circuits. The speed at which future circuits will operate will be limited by RC delay in the interconnect. As yet the only fully dense materials with a dielectric constant less than about 2.4 are fluorinated polymers or fully aliphatic hydrocarbon polymers, but these have not met requirements for adhesion and thermal stability.
Thus, considerable effort has been focused towards the development of porous dielectric materials. These can be thought of as composite materials, with the value of their dielectric constants intermediate between that of air and the fully dense phase. Several classes of dielectric films, including porous oxides, polymers, and porous polymers have been described in the patent and open literature. While most polymers are inherently lower in dielectric constant than silicon dioxide-based films, the long history of silicon dioxide in integrated circuits favors their use. Many of the subsequent processing steps in IC fabrication, including patterning, etching, photoresist removal, cleaning and chemical mechanical polishing, have been developed and proven for silicon dioxide, so porous silicon dioxide films are potentially more easily integrated into existing production schemes. New processes for etching, photoresist removal, cleaning and polishing will need to be developed and proven before polymer films will become an attractive alternative to silicon dioxide.
U.S. Pat. No. 4,987,101, issued to Kaanta, et al. on Jan. 22, 1992 describes a process to prepare fully porous (air gap) structures by depositing a removable material in the critical area of the device, applying a solid cap to this material, and removing the temporary filler through holes bored in the cap. This requires several difficult process steps to completely eliminate all material from the desired areas. Additionally, there would be no mechanical support provided by the air gap. This could lead to deformations of the circuit as the device is cycled through high temperatures in subsequent processing steps.
A common approach taken to achieve porous films on semiconductor wafers draws upon the methods of sol-gel chemistry to produce porous xerogels. These methods typically employ the hydrolysis and condensation reaction of metal or metalloid alkoxides to form a gel containing a continuous solid phase of the corresponding metal or metalloid oxide. The gel is filled with the solvent and other liquid reactants used in the process that must be removed to achieve a porous solid matrix. The sol-gel process produces porous materials with fine particle sizes (2-10 nm) and very high porosities (70-99%). U.S. Pat. No. 4,652,467 to Brinker et al. describes preparing such a gel of silicon oxide. The gel is then dried by evaporative methods yielding a film of pure silicon dioxide. However, there is significant shrinkage resulting from the further condensation reaction of the silica particles as the gel structure is drawn together by the surface tension of the evaporating liquids. This leads to high density films (relative to the as-deposited material, but not necessarily relative to fully dense oxide) and increases their dielectric constant.
A method to avoid the problem of gel shrinkage during drying, developed by Gnade, et al, and Cho, et al. and described in U.S. Pat. Nos. 5,470,802, 5,494,858, 5,504,042, and 5,561,318 involves a further chemical derivatization of the silicon dioxide surface with an unreactive organic group. The chemical derivatization prevents condensation reactions as the gels shrink, and allows low density materials to be prepared by evaporative drying. These sol-gel processes require several chemical reactions to be performed after the alkoxide precursor solution has been applied to the wafer, which leads to difficulties of reproducibility and low throughput. Additionally, as the dielectric constant of porous silicon dioxide varies linearly with porosity (from 3.9 at full density, to 1.0 at full porosity) a very high porosity will be needed to achieve dielectric constants less than 2.0. This fact, and the random nature of the gelation process, increase the likelihood of encountering extremely large pores that would be detrimental to circuit fabrication. Several reports have been published by integrated circuit manufacturers which demonstrated successful integration of xerogel films, but the overall dielectric constant of these layers was much higher than 2.0 and it is not clear that these successes can be made economically attractive for large-scale manufacturing.
Thus, there remains a need for a low dielectric constant material with moderate to high porosity, in which pore size is better controlled than the random pores formed in xerogels. Additionally, there is a need for a dielectric material that can be easily deposited on semiconductor wafers with standard wafer processing techniques, and which can withstand the subsequent etch, polish, and metallization steps. It would further be desirable if the dielectric material had better mechanical properties than the porous materials that have been developed to date.
SUMMARY
A two-component porous material including small silicalite crystals in a porous binder provides a low dielectric constant material useful as an insulating layer in microelectronic devices. Silicalites are microporous crystalline oxides of silicon that are pure-silicon analogs of zeolites. The silicalite/binder porous material uses silicalite nanocrystals that are smaller than the characteristic dimensions of the features on the integrated circuit device. The individual silicalite crystals should be no larger than about 20% of the critical dimension of the smallest feature on the chip and a statistically insignificant number of the crystals should have a long axis greater than about 40% of the critical dimension. The binder is a porous material that links the silicalite nanocrystals together. The binder is formed from a binder precursor material, which, on heating, polymerizes or crosslinks. Examples of useful binder precursors include tetraethoxysilane (TEOS), tetramethoxysilane (TMOS), methylsilsesquioxane, hydridosilsesquioxane, and organic polymers such as poly(arylene ethers) and benzocyclobutenes. The binder material may be a porous amorphous silica. The silicalite/binder porous material can have a dielectric constant less than about 2.6 and a porosity of about 50% or higher.
In the method of making the two component silicalite/binder porous material, the silicate nanocrystals are supplied as a colloidal suspension or slurry in a liquid medium. In one approach, the binder precursor is added directly to the silicalite slurry and the resulting solution is spin coated onto a semiconductor substrate. The amount of binder pre

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