Dielectric isolation using isolated silicon by limited anodizati

Details Dielectric isolation using isolated silicon by limited anodizati Dielectric isolation using isolated silicon by limited anodizati

1987-04-28

1989-03-07

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 67, 437 71, 437 72, 437 33, H01L 2970

Patent

active

048106674

ABSTRACT:
The disclosure relates to a method of forming an isolated semiconductor, preferably of the vertical bipolar variety, wherein a porous highly doped semiconductor layer is oxidized and, with a trench containing silicon oxide therein, forms a region encasing a moderately doped epitaxial layer disposed beneath a lightly doped epitaxial layer. The vertical bipolar device is formed in the moderately doped and lightly doped layers with the highly doped epitaxially deposited layer, which is now a silicon oxide layer, forming a portion of the isolation. The anodization of the highly doped layer takes place using an anodizing acid at a temperature of from about 0 to about 10 degrees C.

REFERENCES:
patent: 3944447 (1976-03-01), Magdo et al.
patent: 4104090 (1978-08-01), Pogge
patent: 4628591 (1986-12-01), Zorinsky et al.
patent: 4643804 (1987-02-01), Lynch et al.
Holmstrom et al., Appl. Phys. Lett. 42 (04), (Feb. 1983), pp. 386-388.

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