Patent
1984-04-11
1987-09-08
Carroll, J.
357 20, 357 59, 357 88, 357 89, H01L 2906, H01L 2712, H01L 2904
Patent
active
046927840
ABSTRACT:
At the bottom of an island region in which a low withstand voltage transistor is formed, is provided a high concentration region of the same conductivity type as the island region having a larger thickness than a high concentration region provided at the bottom of an island region in which a high withstand voltage transistor is formed, and the bottom surfaces and side surfaces of the respective island regions are fixedly secured to a polycrystalline semiconductor layer via insulator films.
REFERENCES:
patent: 2878152 (1959-03-01), Runyan et al.
patent: 3566220 (1971-02-01), Post
patent: 3722079 (1973-03-01), Beasom
patent: 3954522 (1976-05-01), Roberson
patent: 4146905 (1979-03-01), Appels et al.
patent: 4272307 (1981-06-01), Mayrand
patent: 4379726 (1983-04-01), Kumamaru
Carroll J.
NEC Corporation
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