Die stacking scheme

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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C257S724000

Reexamination Certificate

active

07008823

ABSTRACT:
An improved semiconductor die stacking scheme is provided. In accordance with one embodiment of the present invention, a method of stacking a plurality of semiconductor die is provided. In accordance with another embodiment of the present invention a multiple die semiconductor assembly is provided. Each embodiment relates generally to a stacked semiconductor die assembly including a substrate, first and second semiconductor dice including stacking surfaces and active surfaces, a decoupling capacitor, and one or more conductive lines connecting elements of the assembly.

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DERW 2001-577215, May 7, 2001, Han.
“Multi-Chip Module on Laminate, High-performance packaging for today's silicon,” IBM Microelectronics, 1998.

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