Stock material or miscellaneous articles – Structurally defined web or sheet – Including variation in thickness
Reexamination Certificate
2000-04-12
2002-06-04
Jones, Deborah (Department: 1775)
Stock material or miscellaneous articles
Structurally defined web or sheet
Including variation in thickness
C428S163000, C428S212000, C428S469000, C428S627000, C428S632000, C428S672000, C428S678000, C156S153000, C156S244160, C029S558000, C029S896600, C257S666000, C257S676000
Reexamination Certificate
active
06399182
ABSTRACT:
FIELD OF THE INVENTION
The present invention is directed to bonding of microelectronic components. More particularly, the present invention is directed to die attachment wherein the substrate has a grooved surface.
BACKGROUND OF THE INVENTION
Microelectronic components can be bonded by the eutectic bonding process. Typical microelectronic components include high power discrete semiconductor devices such as power transistors, radio frequency and microwave frequency amplifiers, power control switches and the like. Devices of these types generate a significant amount of heat in operation, on the order of 10 to 500 watts, and thus require heat dissipation through their carriers, e.g. ceramic substrates, in order to prevent overheating and damage to the device, such as diminished performance or operational failure.
Heat conduction is required as part of the thermal management of the semiconductor device and also for heat experienced in assembly procedures such as die attachment, wire bonding, encapsulation, testing and the like. Heat dissipation is required to cool the devices during use.
As an example, microelectronic packages for power transistors have included a ceramic substrate on whose top surface the die is attached, and two metallized pads are disposed to which leads are attached and the die is wire bonded. A metal heat sink, such as copper, is disposed on the bottom surface of the ceramic substrate. The finished assembly is utilized in electronic apparatus containing circuit boards. The circuit board generally has cavities for accepting the power transistor package, and the bottom heat sink is placed in thermal contact with a heat sink located at the bottom of the cavity of the circuit board.
A microelectronic component is typically bonded to either ceramic or metallic substrates using the eutectic bonding process. The choice of metal or ceramic for the substrate depends on the particular type of microelectronic device being utilized-some devices require a thermally conducting, electrically insulating substrate, and other devices require a thermally conducting, electrically conducting substrate. The eutectic bonding process has become the standard form of attachment in the RF packaging industry because of its excellent thermal properties. In the eutectic bond process, the backside of a silicon chip (referred to as the die) is coated with a thin layer of gold. The substrate to which the die is bonded is usually plated with a metal such as nickel, followed by a relatively thick layer of gold. The substrate is then heated to a temperature of about 420° C. to about 440° C. The die is brought into contact with the hot gold surface. Immediately, a liquid alloy of gold and silicon is formed in-situ which solidifies upon cooling forming the die bond.
During solidification, the gold and silicon again segregate into discreet particles (or phases)—the gold phase being the most prevalent. The prevalence of the gold phase in the die bond results in a material with very high thermal conductivity, which can dissipate heat generated during the operation of the transistor die.
Information about die attachment methods is disclosed in “Die Attachment Methods” by Leo G. Feinstein,
Electronic Materials Handbook,
Vol. 1, 1989, ASM International, Materials Park, Ohio, pp. 213-223.
A problem with the eutectic bonding process is that the quality of the joint is unpredictable. Large voids can be formed in the gold/silicon joint, resulting in poor thermal contact between the die and the substrate, thus shortening the life of the device. The industry, however, has not addressed the cause of voiding.
U.S. Pat. No. 5,773,362 to Tonti et al. discloses a method for manufacturing a heat sink wherein the back of the silicon wafer is roughened. The roughened surface is coated with aluminum and chromium. Optionally, aluminum can be plated to fill the voids on the backside, followed by a chemical-mechanical polish to planarize the surface. While Tonti '362 roughens the backside of a silicon wafer, the roughened surface is coated and is not available during, the eutectic bonding process.
What is needed in the art is a die bond that is substantially free from large, non-uniform voids to provide for thermal dissipation.
It is therefore an object of the invention to provide a substrate for a microelectronic package that has grooves on a surface for bonding.
It is another object of the invention to provide a method of producing a substantially uniform bond by using a grooved substrate.
It is another object of the invention to provide a die bond that is substantially free from large, non-uniform voids.
SUMMARY OF THE INVENTION
The present invention provides a substrate for a microelectronics package comprising a substrate that has grooves on a surface for bonding.
The present invention also provides a method for preparing a substrate for bonding comprising forming a grooved surface in the substrate for accepting a die for bonding, wherein the grooves are of sufficient size to provide a substantially uniform die bond, but not so large as result in transistor cells that have no good thermal path to the underlying substrate.
The present invention also provides a method for forming a bond between a substrate and a die comprising: providing a substrate and a die; wherein the substrate has grooves formed in a surface area for accepting the die for bonding and having a metallization thereon sufficient to form a eutectic bond with the die having a gold metallization thereon; and forming a eutectic bond between the substrate and the die.
Forming the eutectic bond includes heating the substrate; contacting the metallized grooved surface of the substrate with the gold metallized surface of the die; scrubbing the die onto the substrate by moving the die back and forth while maintaining contact; and cooling the substrate and die.
The present invention also provides a microelectronic structure comprising a substrate and a die, wherein the substrate has grooves on a surface adapted for bonding with the die, and wherein a bond is formed between the substrate and the die.
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patent: 031565 (1989-05-01), None
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Leo G. Feinstein, “Die Attachment Methods,” Electronic Materials Handbook, ASM International (Materials Park, Ohio), (Nov. 11, 1989).
Carrasco Gabriel M.
Harris Jonathan H.
Rubel Erich K.
CMC Wireless Components, Inc.
Jones Deborah
Renner Kenner Greive Bobak Taylor & Weber
Stein Stephen
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