Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2003-04-11
2004-12-21
Thompson, Craig A. (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S462000
Reexamination Certificate
active
06833288
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a dicing method for a micro electro mechanical system chip, and more particularly to a dicing method for a micro electro mechanical system chip, in which damage to microstructures is prevented during a dicing process by using a protective mask.
2. Description of the Related Art
The information society of the 21
st
century demands the recognition of the peripheral information, utilizing many sensors to measure/analyze in real time. As recent industries follow an information/electronic trend, there is growing demand for sensors to detect physical properties such as pressure, temperature, and speed and chemical properties.
Unfortunately, the current sensors as components have size limitations, quality limitations in terms of function, performance and reliability, and cost reduction limitations. The technology that can overcome these limitations is a high integrated micro sensors-on-chip using Micro Electro-Mechanical System (hereinafter, MEMS).
MEMS sensors, manufactured through semiconductor batch processes can be integrated with signal process circuits on a single chip by on-chip integration, have functions such as self diagnosis, computation and digital signal output, as well as have low cost, high reliability, and micro packaging characteristics. The high integrated micro sensors-on-chip is an integrated micro multi-sensing system that incorporates several MEMS sensors and signal process circuits on a silicon chip. It acts as an information gathering center. The information gathering center gathers and analyzes peripheral information such as physical properties (pressure, speed, position, attitude etc.) and chemical properties, and outputs the needed information.
General MEMS techniques are advantageous in development of low cost, high performance microelements. Therefore, applications to inertial sensors, pressure sensors, biomedical elements and optical communication components have been actively studied.
MEMS-based variable optical attenuators (VOA) and optical switches (OSW) are kinds of optical communication components, in which a barrier and an actuator fabricated by bulk micro machining technology serve to attenuate the quantity of light and switch an optical path between two optical fibers, i.e., a transmitter optical fiber and a receiver optical fiber aligned on a chip in a straight line. Like the MEMS VOA, in case of optical MEMS elements, precise alignment of optical fibers on a chip is important. Therefore, the optical MEMS elements require high aspect ratio structures to ensure precise alignment between optical fiber core and chip structures.
FIG. 1
is a cross sectional view of conventional high aspect ratio MEMS structures and
FIG. 2
is a microphotograph of MEMS structures damaged during a dicing process.
In a conventional semiconductor manufacturing process, there are no MEMS microstructures on the surface of a wafer. In this respect, the wafer is mounted on a guide ring, sprayed with cooling water and diced during a high-speed rotation of a dicing blade.
In the case where a dicing method used in the conventional semiconductor manufacturing process is applied to optical MEMS structures requiring high aspect ratio structures as shown in
FIG. 1
, the structures are liable to be damaged due to water pressure of cooling water required for absorbing heat generated during dicing and air currents generated about a high-speed rotating dicing blade, as shown in FIG.
2
.
Optical MEMS elements require direct alignment with optical fibers on a chip. Therefore, microstructures are directly exposed to cooling water and air currents during dicing and thus readily damaged. As a result, the yield of chips is undesirably lowered.
To solve the above problem, a dicing process was proposed in which a wafer is cut and separated into discrete chips using a fan-shaped diamond blade cutter.
In this case, however, there are problems in that accurate control of the cutting direction with respect to the crystal axis of a wafer is required and a large amount of foreign substances are generated in the cutting process.
SUMMARY OF THE INVENTION
Therefore, the present invention has been made in view of the above problems, and it is an object of the present invention to provide a dicing method for a micro electro mechanical system chip, in which a high yield and productivity of chips can be accomplished, resulting from preventing damage to microstructures during a dicing process by using a protective mask.
In accordance with one aspect of the present invention, the above object and other objects can be accomplished by the provision of a dicing method for a micro electro mechanical system chip, comprising the steps of designing a grid line and wafer pattern on a chip-scale on the non-adhesive surface of a transparent tape as a protective mask (first step); sticking microstructure-protecting membranes on the adhesive surface of the transparent tape (second step); putting the transparent tape on the whole surface of a wafer in a state wherein the grid line designed on the non-adhesive surface of the transparent tape is matched to the dicing line (or hairline) of the wafer (third step); cutting the transparent tape to a size larger than the wafer, mounting the wafer on a guide ring and dicing the wafer (fourth step); and separating the transparent tape from diced chips (fifth step).
Preferably, in the second step, the microstructure-protecting membrane may be a non-adhesive vinyl free from foreign substances.
Further preferably, in the second step, the size of the microstructure-protecting membrane may be sufficient to ensure that the membrane sufficiently protects microstructures, is smaller than a chip, and prevents the separation of the transparent tape from the wafer during dicing.
REFERENCES:
patent: 02001044142 (2001-02-01), None
Korean Treatise from Korean MEMS conference held Apr. 12, 2002 Proceedings of the 4thKorean Mems Conference.
Jung Sung Cheon
Kang Joon Seok
Lee Hyun Kee
Yoon Sang Kee
Darby & Darby
Samsung Electro-Mechanics Co. Ltd.
Thompson Craig A.
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