Dice by grind for back surface metallized dies

Semiconductor device manufacturing: process – Semiconductor substrate dicing

Reexamination Certificate

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C438S113000, C438S427000, C438S462000, C438S464000, C438S626000, C257S620000, C257S787000, C257SE23179, C257SE23116, C257SE21599

Reexamination Certificate

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07655539

ABSTRACT:
Semiconductor device processing and methods for dicing a semiconductor wafer into a plurality of individual dies that can have back surface metallization are described. The methods comprise providing a wafer with pre-diced streets in the wafer's front surface, applying a sidewall masking mechanism to the front surface of the wafer so as to substantially fill the pre-diced streets, thinning the back surface of the wafer so as to dice the wafer (e.g., by grinding, etching, or both) and expose a portion of the sidewall masking mechanism from the back surface of the wafer, and applying a material, such as metal, to the back surface of the diced wafer. These methods can prevent the metal from being deposited on die sidewalls and may allow the separation of individual dies without causing the metal to peel from the back surface of one or more adjacent dies. Other embodiments are also described.

REFERENCES:
patent: 6465344 (2002-10-01), Barton
patent: 6642127 (2003-11-01), Kumar et al.
patent: 2007/0087524 (2007-04-01), Montgomery

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