Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
1999-12-27
2001-07-10
Bowers, Charles (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S692000, C438S691000, C216S089000, C106S003000, C252S079100, C451S036000
Reexamination Certificate
active
06258721
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
None
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH
Not applicable.
BACKGROUND OF THE INVENTION
The present invention relates generally to the preparation of semiconductor devices and more particularly to improved slurry compositions for the chemical-mechanical planarization (CMP) of metal (e.g., Cu) layers and barrier materials (e.g., Ta, TaN, etc.) and dielectric materials for their polishing.
A semiconductor wafer typically includes a substrate, such as a silicon wafer, on which a plurality of integrated circuits have been formed. In the manufacture of integrated circuits, wafer surface planarity and quality is of extreme importance. In order to achieve the degree of planarity required to produce ultra high density integrated circuits, CMP processes are being employed.
In general, CMP involves pressing a semiconductor wafer against a moving polishing surface that is wetted with a chemically reactive, abrasive slurry. Conventional slurries either are acidic or basic, and generally contain alumina, silica, zirconium oxide, magnesium oxide, or cerium oxide abrasive particles. The polishing surface usually is a planar pad made of a relative soft, porous material, such as polyurethane. The pad usually is mounted on a planar platen. Continuous pad devises also are being tested. Systems devoid of a slurry where the pad contains the abrasive also are being used.
Integrated circuits are chemically and physically integrated into a substrate by patterning regions in the substrate and layers on the substrate. The layers generally are formed of various materials having either a conductive, insulating, or semiconducting nature. Also, barrier materials or barriers are used to prevent the migration of ions and adhesion promoters. In order for a device to have high yields, it is crucial to start with a flat semiconductor wafer. If the surface is not uniform (e.g., areas of unequal elevation or surface imperfections), various problems can occur which may result in a large number of inoperable devices. Further in this regard can be found in the following references: Luo, et al., “Chemical-Mechanical Polishing of Copper: A Comparative Analysis,” February 13-14
CMP-MIC Conference
, 1997 ISMIC—200:197/0083; Babu, et al., “Some Fundamental and Technological Aspects of Chemical-Mechanical Polishing of Copper Films: A Brief Review,” February 19-20, 1998
CMP-MIC Conference
, 1998 IMIC—300P98/0385; Tseng, et al., “Effects of mechanical characteristics on the chemical-mechanical polishing of dielectric thin films,”
Thin Solid Films
, 290-291 (1996) 458-463; Nanz, et al., “Modeling of Chemical-Mechanical Polishing: A Review,”
IEEE Transactions on Semiconductor Manufacturing
, Vol. 8, No. 4, November 1995; Stiegerwald, et al., “Pattern Geometry Effects in the Chemical-Mechanical Polishing of Inlaid Copper Structures,”: ″
J. Electrom. Soc
., Vol 141, No. Oct. 10, 1994; Fury, “Emerging developments in CMP for semiconductor planarization—Part 2
,” Solid State Technology
, 81-88, July 1995; Fury, “CMP Standards: A Frustration Cure,”
Semiconductor International
, November 1995.
A related, but different, operation performed on magnetic disks is called “texturing.” Texturing is used to reduce stiction (static friction). More irregular surfaces have lower stiction and this leads to the practice of texturing disk surfaces using fixed or free abrasive particles. Texturing operations are known in the art to utilize typically <0.4 &mgr; diamond at a concentration of less than 2 carats/liter in order to achieve approximately 7A Ra by AFM. Alumina also is a common abrasive used in texturing operations. See for following references in this regard: Cooper, et al., “Tapes for Polishing and Texturing Thin-Film Magnetic Disks,” Technical Information Report presented at Discon USA '96, Texwipe Company LLC; and Bhushan, “Magnetic Slider/Rigid Disk Substrate Materials and Disk Texturing Techniques—Status and Future Outlook,”
Adv. Info. Storage Syst
., Vol. 5,1993: 175-209.
Despite CMP being commercially practice, there still are a number of problems including, for example, non-uniformity in material removal rate, Cu dishing, oxide erosion, Cu line corrosion, and other surface defects. Thus, there exists a need in CMP for improvements.
BRIEF SUMMARY OF THE INVENTION
Broadly, chemical-mechanical planarization (CMP) of the Cu of semiconductor wafers is practiced using polycrystalline diamond particles. Desirably, between about 0.001 and 5 wt-% diamond particles having an average particle size not substantially above about 0.4&mgr; is employed. Desirably, conventional chemicals as are used in conventional CMP are included. Either a one-stage or a multistage process can be used.
The multistage process for the chemical-mechanical planarization (CMP) of Cu commences with forming a primary aqueous or non-aqueous (e.g., using alcohols and ketones as non-aqueous carriers) slurry from (i) between about 0 and 7 wt-% of an oxidizer, (ii) between 0 and 7 wt-% of a chelating agent, (iii) between about 0 and 5 wt-% of a surfactant, (iv) between about 0.001 and 5 wt-% diamond particles having an average particle size not substantially above about 0.4&mgr;, and (v) an amount of a pH adjustment agent so that the aqueous slurry has a pH of between about 3 and 10, and advantageously about 5). The Cu of the semiconductor wafer then is subjected to CMP using the primary aqueous slurry and then is subjected to a cleaning operation. Next, a secondary aqueous slurry from (i) between about 0 and 5 wt-% of an a hydroxyl amine compound, (ii) between about 0 and 7 wt-% of a chelating agent, (iii) between about 0 and 5 wt-% of a surfactant, (iv) between about 0.001 and 5 wt-% diamond particles having an average particle size not substantially above about 0.4&mgr;, and (v) an amount of a pH adjustment agent so that the aqueous slurry has a pH of between about 4 and 10, and advantageously about 8.5 pH. The semiconductor wafer then is subjected to CMP using said secondary aqueous slurry. Thereafter, the semiconductor wafer again is subjected to a cleaning operation.
DETAILED DESCRIPTION OF THE INVENTION
Surface planarity is of paramount importance in microelectronics. With the integrated technology approaching the era of Ultra Large Scale Integration (ULSI), CMP is touted as the only viable technique to meet today's planarity requirements. Some of the most important issues in CMP today addressed to dishing and erosion, corrosion, defects of the surface, include the control of polishing rate and selectivity among different materials on the surface. To accomplish these goals, a polishing particles with desired hardness and functionality is the most promising solution. Because of its hardness (i.e., expected scratching due to its hardness), diamond has heretofore not been viewed as a promising candidate for use in CMP operations. Particle shape and use of polycrystalline diamond appear to allay scratching concerns; however, polycrystalline diamond also is 5-10 times more expensive than typical monocrystalline diamond. Cost, then, is the second major concern that has steered the art clear of using diamond in CMP operations. Cost has been mitigated by using very low amounts of polycrystalline diamond, i.e., about 0.01 wt-%-0.1wt-% (0.5 cts/liter-5 cts/liter). The present invention, however, utilizes the hardness of diamond in CMP to advantage which heretofore has alluded the art.
In the desirable two stage Cu CMP operation disclosed herein (while the invention was initially developed for Cu CMP, likely it will be applicable to other CMP operations), the use of the primary diamond slurry in the primary or first stage enables better selectivity for removal of copper relative to Ta than is seen using conventional alumina or silica slurries. When subjecting the semiconductor wafer to post stage one cleaning operations, fewer diamond particles are residual on the wafer than is seen using conventional alumina slurries. Less residual abrasive particles post-cleaning is expected to translate into less wa
Buckley, Jr. Donald Joseph
Cerutti David Bruce
Horkay Ferenc
Keleher Jason J.
Li Yuzhuo
Bowers Charles
General Electric Company
Lee Hsien-Ming
Mueller and Smith LPA
LandOfFree
Diamond slurry for chemical-mechanical planarization of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Diamond slurry for chemical-mechanical planarization of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Diamond slurry for chemical-mechanical planarization of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2527710