Diamond metal-filled patterns achieving low parasitic...

Details Diamond metal-filled patterns achieving low parasitic... Diamond metal-filled patterns achieving low parasitic...

2006-02-14

2006-02-14

Fourson, George (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S775000, C257S776000, C257S629000, C438S666000

Reexamination Certificate

active

06998716

ABSTRACT:
Provided are methods and composition for forming diamond metal-filled patterns above an integrated circuit substrate. A metal layer is formed above the integrated circuit substrate, which is then patterned such that a metal line is created. A plurality of diamond-shaped metal regions are then formed at least one of above and adjacent to the metal line formed on the integrated circuit substrate such that the density of metal on the integrated circuit substrate is greater than a specified density, thereby ensuring that a surface of dielectric formed above the metal line remains substantially planar after application of CMP to the dielectric layer.

REFERENCES:
patent: 5639697 (1997-06-01), Weling et al.
patent: 5854125 (1998-12-01), Harvey

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