Diagnostic system

Details Diagnostic system Diagnostic system

1987-03-16

1989-10-24

Clark, David L.

Boots, shoes, and leggings

371 18, G06F 1122

Patent

active

048766453

ABSTRACT:
In a logic unit provided with a plurality of internal registers, an internal memory and a combinational circuit, such as an arithmetic unit, at least one of the plurality of internal registers is arranged to be scanned in and out. During diagnosis, when executing an instruction which makes reference to the internal memory, the register that can be scanned in and scanned out is used in place of the internal memory for diagnosing the combinational circuit.

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patent: 3434116 (1969-03-01), Anacker
patent: 3748653 (1973-07-01), Debruyne et al.
patent: 4183461 (1980-01-01), Sato
patent: 4412283 (1983-10-01), Mor et al.
Boland, L. J., "Buffer Store Replacement Control", IBM Technical Disclosure Bulletin, vol. 11, No. 12, May 1969, pp. 1738-1739.
Balasubramanian, P. S. et al., "Testing LSI Memory Arrays Using On-Chip I/O Shift Register Latches", IBM Technical Disclosure Bulletin, vol. 17, No. 7, pp. 2019-2020.
Leininger, J. C., "On-Chip Testing Enhancement of a Single-Chip Microprocessor", IBM Technical Disclosure Bulletin, vol. 21, No. 1, pp. 5-6.

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