Diagnostic/debug machine architecture

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364200, G06F 1122

Patent

active

043120660

ABSTRACT:
A system is described for enabling the connection of a diagnostic/debugging processor to another host processor for the purpose of troubleshooting that processor's hardware and software. The system is composed of an interface between the diagnostic/debugging processor per se and the host processor to be diagnosed, and of software resident in the diagnostic processor to perform functions required by the user of the system. The system is specifically designed for use with a host processor utilizing LSSD design rules.

REFERENCES:
patent: 3585599 (1971-06-01), Hitt et al.
patent: 3761695 (1973-09-01), Eichelberger
patent: 3764995 (1973-10-01), Helf, Jr. et al.
patent: 3784907 (1974-01-01), Eichelberger
patent: 3786430 (1974-01-01), Hajdu et al.
patent: 3838260 (1974-09-01), Nelson
Kulka et al., "Diagnostic Procedures", IBM Tech. Disclosure Bulletin, vol. 14, No. 9, Feb. 1975, pp. 2749-2750.
Smith "Fault Diagnostics in Multiprocessor Systems", IBM Tech. Disclosure Bulletin, vol. 22, No. 7, Dec. 1979, pp. 3002-3004.

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