Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – With auxiliary means to condition stimulus/response signals
Patent
1992-09-25
1995-05-09
Wieder, Kenneth A.
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
With auxiliary means to condition stimulus/response signals
G01R 104
Patent
active
054143659
ABSTRACT:
An analog built-in-test system has a processor for controlling two identical cells, each of which has its own control means for autonomous operation. Each cell may simultaneously receive and generate analog signals from/to external nodes to be tested/stimulated. For these functions, each cell contains analog to digital (A/D) and digital to analog (D/A) converters, timers which control the sampling/conversion rate of the A/D and D/A converters, and A/D and D/A memory means, each for storing the digitized samples. Each cell further has an additional timer for measuring time periods between programmable triggers. Besides being coupled to the processor, each cell is coupled to the other by means of a cell-to-cell bus which conveys data and control signals from one cell to the other. The architecture including the cell-to-cell bus permits the two cells to coordinate with one another to perform measurements such as the phase difference between two analog signals. This architecture also provides the ability to generate a known signal in one cell which can be received by the second cell in order to perform a diagnostic check of the system.
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Gosh, John, "IC Merges with 32-Kbyte Flash Eprom With 16-Bit Micro", Electronic Design, May 14, 1992, pp. 99-102.
Coggins Timothy R.
Contarino Charles A.
Dalbey Michael
Groszek Joseph
Roth George L.
Bowser Barry C.
Martin Marietta Corporation
Wieder Kenneth A.
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