Devices, systems and methods for implementing a Kanerva memory

Details Devices, systems and methods for implementing a Kanerva memory Devices, systems and methods for implementing a Kanerva memory

1993-05-28

1995-02-14

Fears, Terrell W.

Static information storage and retrieval

Associative memories

Ferroelectric cell

36523003, G11C 1300

Patent

active

053901398

ABSTRACT:
A memory system 10 is provided including a processor 12 and an active memory device 14 coupled to a processor 12. Active memory 14 includes a first memory 20 for storing a plurality of possible addresses and a second memory 22 for storing an actual address received from processor 12. Circuitry 26 is provided for identifying at least one active address from ones of the possible addresses stored in first memory 20 as a function of the actual address stored in second memory 22.

REFERENCES:
patent: 5208782 (1993-05-01), Sakuta et al.
patent: 5229971 (1993-07-01), Kiryu et al.

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