Device to receive, buffer, and transmit packets of data in a...

Details Device to receive, buffer, and transmit packets of data in a... Device to receive, buffer, and transmit packets of data in a...

2004-05-10

2008-11-11

Pham, Brenda (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S389000

Reexamination Certificate

active

07450583

ABSTRACT:
A device to create, receive, and transmit packets of data in a packet switching network. This device employs a direct memory access packet controller which would interface between memory contained within a computer system and a packet switched network. This direct memory access packet controller would utilize one or more micro-engines that would dynamically allocate buffer space to process received packets of data. This direct memory access packet controller would further utilize a transmit cell FIFO circuit to allocate buffer space to packets being transmitted. In addition, a sequencer would act to control the workflow of packets being received and transmitted.

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patent: 7215670 (2007-05-01), Karlsson et al.
patent: 2004/0151176 (2004-08-01), Burton et al.

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