Device to receive, buffer, and transmit packets of data in a...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Details

C370S360000, C370S389000, C370S395540, C709S250000

Reexamination Certificate

active

10761394

ABSTRACT:
A device to create, receive, and transmit packets of data in a packet switching network. This device employs a direct memory access packet controller which would interface between memory contained within a computer system and a packet switched network. This direct memory access packet controller would utilize one or more micro-engines that would dynamically allocate buffer space to process received packets of data. This direct memory access packet controller would further utilize a transmit cell FIFO circuit to allocate buffer space to packets being transmitted. In addition, a sequencer would act to control the workflow of packets being received and transmitted.

REFERENCES:
patent: 5598541 (1997-01-01), Malladi

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