Device to receive, buffer, and transmit packets of data in a...

Details Device to receive, buffer, and transmit packets of data in a... Device to receive, buffer, and transmit packets of data in a...

2008-04-01

2008-04-01

Qureshi, Afsar (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S360000, C370S389000, C370S395540, C709S250000

Reexamination Certificate

active

07352763

ABSTRACT:
A device to create, receive, and transmit packets of data in a packet switching network. This device employs a direct memory access packet controller which would interface between memory contained within a computer system and a packet switched network. This direct memory access packet controller would utilize one or more micro-engines that would dynamically allocate buffer space to process received packets of data. This direct memory access packet controller would further utilize a transmit cell FIFO circuit to allocate buffer space to packets being transmitted. In addition, a sequencer would act to control the workflow of packets being received and transmitted.

REFERENCES:
patent: 5598541 (1997-01-01), Malladi

Affiliated with

Also associated with

Rating

Device to receive, buffer, and transmit packets of data in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Device to receive, buffer, and transmit packets of data in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device to receive, buffer, and transmit packets of data in a... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2770988