Device to detect the functioning of the read system of an EPROM

Details Device to detect the functioning of the read system of an EPROM Device to detect the functioning of the read system of an EPROM

1989-02-27

1990-03-13

Hecker, Stuart N.

Static information storage and retrieval

Addressing

Sequential

36518909, 365228, 365195, 365185, G11C 2900, G11C 700

Patent

active

049087991

ABSTRACT:
An electrically programmable read only memory including an inhibiting circuit for preventing operation of the memory if a reading voltage higher than a predetermined level above a standard reading voltage is applied as a reading voltage during a read operation. The inhibiting circuit includes a detection circuit for providing a detection signal in the event that a reading voltage higher than the standard reading voltage is applied to the memory, and a logic circuit connected to an output of the detection circuit and having an output supplied as an inhibiting signal, for example, to inhibit a clock signal within the integrated circuit, upon reception of the detection signal. In a preferred embodiment, the detection circuit includes an enhanced-type transistor connected in series with a depleted transistor serving as a load. The enhanced transistor has a channel ranging between 50 and 100 microns and a channel length ranging from 4 to 6 microns.

REFERENCES:
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Patents Abstracts of Japan, vol. 7, No. 196 (P-219) [1341], 26 Aout 1983; & JP-A-58 94 195 (Shin Nippon Denki K.K.) 04-06-1983.
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