Device synchronization on a graphics accelerator

Details Device synchronization on a graphics accelerator Device synchronization on a graphics accelerator

1995-04-28

1998-09-22

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Graphic command processing

345514, G06F 1500

Patent

active

058121501

ABSTRACT:
A method of controlling the display of graphics data on a computer display, the computer comprising a draw engine, comprised of detecting predetermined logical condition of a draw operation for display, saving the state of the draw engine, performing a new draw operation, and restoring the state of the draw engine.

REFERENCES:
patent: 4703317 (1987-10-01), Shiomi et al.
patent: 5050097 (1991-09-01), Hasebe
patent: 5163123 (1992-11-01), Nakayama
patent: 5282269 (1994-01-01), Willems et al.
patent: 5315696 (1994-05-01), Case et al.
patent: 5341472 (1994-08-01), Leak
patent: 5369744 (1994-11-01), Fukushima et al.
patent: 5371849 (1994-12-01), Peaslee et al.
patent: 5404437 (1995-04-01), Nguyen
patent: 5430841 (1995-07-01), Tannenbaum et al.
patent: 5455599 (1995-10-01), Cabral et al.
patent: 5483626 (1996-01-01), Kadono
patent: 5519825 (1996-05-01), Naughton et al.

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