Device structures for high density integrated circuits

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357 235, 357 239, 357 41, 357 49, 365104, 365184, H01L 2712, H01L 2978, G11C 1140

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045339341

ABSTRACT:
A semiconductor device structure incorporating the edge of silicon island as a surface for diffusing impurities is described to form the drain and source of an MOS transistor and interconnections therebetween to form semiconductor devices such as MOS transistors, variable threshold MNOS transistors, row decoders for use in memories, memory arrays, interconnect crossovers, and high-voltage transistors. A semiconductor process is described for fabricating the above devices utilizing four or five masks.
The invention overcomes the problem of high-density integrated circuits by utilizing the edges of silicon islands on an insulating substrate as well as the upper surface of the islands. In addition, contact metallizations are non-critical because of the Schottky barrier diode formed between aluminum and n-type silicon. Both n and p-type semiconductor devices are described.

REFERENCES:
patent: 3584183 (1971-06-01), Chiaretta
patent: 3840888 (1974-10-01), Gaensslen et al.
patent: 4054895 (1977-10-01), Ham
patent: 4296428 (1981-10-01), Haraszti
Krick, IBM Tech. Discl. Bulletin, vol. 15, No. 2, Jul. 1972, pp. 466-467.

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