Device package and methods for the fabrication and testing...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S717000, C257SE21506

Reexamination Certificate

active

07888793

ABSTRACT:
Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.

REFERENCES:
patent: 4771630 (1988-09-01), Croce et al.
patent: 4893499 (1990-01-01), Layton et al.
patent: 4897711 (1990-01-01), Blonder et al.
patent: 5082339 (1992-01-01), Linnebach
patent: 5177753 (1993-01-01), Tanaka
patent: 5201987 (1993-04-01), Hawkins et al.
patent: 5231686 (1993-07-01), Rabinovich
patent: 5259054 (1993-11-01), Benzoni et al.
patent: 5262921 (1993-11-01), Lamers
patent: 5287001 (1994-02-01), Buchmann et al.
patent: 5289345 (1994-02-01), Corradetti et al.
patent: 5291572 (1994-03-01), Blonder et al.
patent: 5307139 (1994-04-01), Tyson, II et al.
patent: 5308442 (1994-05-01), Taub et al.
patent: 5327443 (1994-07-01), Tanaka et al.
patent: 5432998 (1995-07-01), Galasco et al.
patent: 5448014 (1995-09-01), Kong et al.
patent: 5479540 (1995-12-01), Boudreau et al.
patent: 5552635 (1996-09-01), Kim et al.
patent: 5713508 (1998-02-01), Gaynes et al.
patent: 5727104 (1998-03-01), Sasaki et al.
patent: 5740261 (1998-04-01), Loeppert et al.
patent: 5812717 (1998-09-01), Gilliland
patent: 5891354 (1999-04-01), Lee et al.
patent: 5915168 (1999-06-01), Salatino et al.
patent: 5966291 (1999-10-01), Baumel et al.
patent: 5978220 (1999-11-01), Frey et al.
patent: 6036872 (2000-03-01), Wood et al.
patent: 6091603 (2000-07-01), Daves et al.
patent: 6094919 (2000-08-01), Bhatia
patent: 6133631 (2000-10-01), Belady
patent: 6139761 (2000-10-01), Ohkuma
patent: 6167751 (2001-01-01), Fraim et al.
patent: 6221769 (2001-04-01), Dhong et al.
patent: 6228675 (2001-05-01), Ruby et al.
patent: 6275513 (2001-08-01), Chang-Hasnain et al.
patent: 6354747 (2002-03-01), Irie et al.
patent: 6358066 (2002-03-01), Gilliland et al.
patent: 6359333 (2002-03-01), Wood et al.
patent: 6422766 (2002-07-01), Althaus et al.
patent: 6439032 (2002-08-01), Lehmann
patent: 6452798 (2002-09-01), Smith et al.
patent: 6477056 (2002-11-01), Edwards et al.
patent: 6660564 (2003-12-01), Brady
patent: 6746158 (2004-06-01), Merrick
patent: 6773532 (2004-08-01), Wolf et al.
patent: 6776623 (2004-08-01), Yunker et al.
patent: 6818464 (2004-11-01), Heschel
patent: 6843107 (2005-01-01), Newman et al.
patent: 6992887 (2006-01-01), Jairazbhoy et al.
patent: 7129163 (2006-10-01), Sherrer et al.
patent: 7160039 (2007-01-01), Hargis et al.
patent: 2002/0113296 (2002-08-01), Cho et al.
patent: 2003/0034438 (2003-02-01), Sherrer et al.
patent: 2003/0071283 (2003-04-01), Heschel
patent: 2003/0081914 (2003-05-01), Steinberg et al.
patent: 2003/0104651 (2003-06-01), Kim et al.
patent: 2003/0128854 (2003-07-01), Mullenborn et al.
patent: 2003/0159772 (2003-08-01), Wolf et al.
patent: 2003/0161026 (2003-08-01), Qin et al.
patent: 2003/0161133 (2003-08-01), Fu et al.
patent: 2003/0161363 (2003-08-01), Wolf et al.
patent: 2003/0161603 (2003-08-01), Nadeau et al.
patent: 2003/0169983 (2003-09-01), Branch et al.
patent: 2003/0183920 (2003-10-01), Goodrich et al.
patent: 2003/0206703 (2003-11-01), Chiu et al.
patent: 2004/0012083 (2004-01-01), Farrell et al.
patent: 2004/0067604 (2004-04-01), Ouellet et al.
patent: 2004/0076384 (2004-04-01), Kato et al.
patent: 2004/0077117 (2004-04-01), Ding et al.
patent: 2004/0077139 (2004-04-01), Silverbrook
patent: 2004/0091268 (2004-05-01), Hogan et al.
patent: 2004/0104460 (2004-06-01), Stark
patent: 2004/0240497 (2004-12-01), Oomori
patent: 2004/0264866 (2004-12-01), Sherrer et al.
patent: 2005/0110157 (2005-05-01), Sherrer et al.
patent: 2005/0111797 (2005-05-01), Sherrer et al.
patent: 2005/0135758 (2005-06-01), Sato et al.
patent: 2005/0141828 (2005-06-01), Narayan et al.
patent: 2005/0286901 (2005-12-01), Sasser et al.
patent: 2006/0002667 (2006-01-01), Aronson
patent: 2006/0278821 (2006-12-01), Sherrer et al.
patent: 2007/0002927 (2007-01-01), Finot
patent: 2007/0081770 (2007-04-01), Fisher
patent: 2007/0278666 (2007-12-01), Garcia et al.
patent: 1094450 (1994-11-01), None
patent: 1261782 (2006-06-01), None
patent: 0430593 (1991-06-01), None
patent: 0465230 (1992-01-01), None
patent: 0590393 (1994-04-01), None
patent: 0911111 (1999-04-01), None
patent: 1061578 (2000-12-01), None
patent: 1168021 (2002-01-01), None
patent: 1321931 (2003-06-01), None
patent: 1333267 (2003-08-01), None
patent: 1729159 (2006-12-01), None
patent: 1002612 (2009-05-01), None
patent: 2312551 (1997-10-01), None
patent: 2419684 (2006-05-01), None
patent: 06020930 (1994-01-01), None
patent: 06149483 (1994-06-01), None
patent: 1999086312 (1999-03-01), None
patent: 11295560 (1999-10-01), None
patent: WO 98/14813 (1998-04-01), None
patent: WO 00/31771 (2000-06-01), None
patent: WO 01/43181 (2001-06-01), None
patent: WO 03/046640 (2003-06-01), None
patent: WO 2004/025239 (2004-03-01), None
patent: WO 2006/097842 (2006-09-01), None
Linder et al., “Fabrication Technology for Wafer Through-Hole Interconnections and Three-Dimensional Stacks of Chips and Wafers”, IEEE, 1994, pp. 349-354.
Pham et al., “A Novel Micromachining Process Using Pattern Transfer Using Pattern Transfer Over large Topography for RF Silicon Technology”, Proceedings of the SAFE/IEEE workshop, Nov. 2000, pp. 125-128.
Rosen et al., “Membrane Covered Electrically Isolated Through-Wafer Via Holes”, J. Microetch, J. Micromech, Microeng.11 (2001) pp. 344-347.
Nguyen et al., “Through-Wafer Copper Electroplating for Three Dimensional Interconnects”, J. Microetch, Microeng.12 (2002) pp. 395-399.
Ok et al., “High Density, High Aspect Ration through-Wafer Electrical Interconnect Vias for MEMS Packaging ”, IEEE Transactions of Advanced Packaging, vol. 26, No. 3 Aug. 2003, pp. 302-309.
Rasmussen eta l., “Batch Fabrication of Through-Wafer Vias in CMOS Wafer for 3-D Packaging Applications”, IEEE, 2003 Electronic Components and Technology Conference, pp. 634-639.
Kutchovkov et al., “New Fabrication Technology for wafer-Through Hole Interconnects”, Proceed. SeSens 2001, pp. 813-817.
Lee et al., “High Temperature Silver-Indium Joints Manufactured at Low Temperature”, Thin Solid Films 366 (2000), pp. 196-201.
Lee et al., “Advances in Bonding Technology for Electronic Packaging”, Journal of Electronic Packaging, vol. 115, Jun. 1993, pp. 201-207.
Lee et al., “High Temperature Tin-Cooper Joints at Low Process Temperature for Stress Reduction”, Thin solid Films 286 (1996), pp. 213-218.
Lee et al., “Au—In Bonding Below the Eutectic Temperature”, IEEE Transactions on Components, Hybrids and Manufacturing Technology, vol. 16, No. 3, May 1993, pp. 311-316.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Device package and methods for the fabrication and testing... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Device package and methods for the fabrication and testing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device package and methods for the fabrication and testing... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2633564

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.