Device isolation method for semiconductor device

Fishing – trapping – and vermin destroying

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437 69, 437 56, 148DIG50, H01L 2176

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056863446

ABSTRACT:
An improved device isolation method for a semiconductor device capable of independently and compatibly providing an isolation film in the interior of well and an isolation film between wells during a consistent process, so that latch-up characteristic can be improved even in a device requiring a design rule of below 0.5 .mu.m, which includes a first step which combines a second step which forms a device isolation film within a well and a third step which forms a device isolation film between wells, the second and third steps being compatible to each other during the same step.

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patent: 5455194 (1995-10-01), Vazquez et al.
Percy V Gilbert et al, "Latch-Up Performance of a Sub-0.5 Micron Inter-well Deep Trench Technology" IEDM 93, pp. 731-734.

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