Device isolation in integrated circuits

Details Device isolation in integrated circuits Device isolation in integrated circuits

1972-04-24

1976-09-07

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Methods

29580, 148187, 156 11, 156 13, 156 17, 357 50, C23F 102, H01L 750

Patent

active

039792374

ABSTRACT:
Isolation of device locations in a monolithic semiconductor integrated circuit is provided by depositing a thin film effective as a polishing stop on a planar surface of the semiconductor body in which the devices are to be fabricated, etching isolation grooves into the body through the thin film, coating the surfaces of the grooves and the film with an insulator layer, and growing polycrystalline material over the insulator layer to fill the grooves. The polycrystalline material in excess of that required to fill the grooves, and any insulator layer covering the planar surface of the thin film, are polished away without affecting the underlying planar surface of the semiconductor body, because the thin film is adapted to withstand polishing without damage. Finally, the thin film is stripped away leaving semiconductor islands having a planar surface and isolated by insulator layer-polycrystalline material filled moats. Devices are fabricated in these islands.

REFERENCES:
patent: 3411200 (1968-11-01), Formigoni
patent: 3433686 (1969-03-01), Marinace
patent: 3493820 (1970-02-01), Rosvold
patent: 3551221 (1970-12-01), Yanagawa
patent: 3559283 (1971-02-01), Kravitz

Affiliated with

Also associated with

Rating

Device isolation in integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Device isolation in integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device isolation in integrated circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2171115