Device improving the processing speed of a modular arithmetic co

Details Device improving the processing speed of a modular arithmetic co Device improving the processing speed of a modular arithmetic co

1997-01-07

1999-09-07

Malzahn, David H.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708491, G06F 772

Patent

active

059480513

ABSTRACT:
Disclosed is an integrated circuit device enabling the computation of multiplication of A by B, especially a computation of the P.sub.field (A,B).sub.N type as defined in the Montgomery method, using a subdivision into words of Bt bits to carry out the different computations. This device is improved by the addition of a register of m * Bt bits containing the totality of the data element A. The invention also relates to a device for the implementation of a modular P.sub.field (A,B).sub.N operation according to the Montgomery method using the improved device presented by the invention.

REFERENCES:
patent: 5513133 (1996-04-01), Cressel et al.
patent: 5742534 (1998-04-01), Monier
patent: 5745398 (1998-04-01), Monier
patent: 5751620 (1998-05-01), Monier
patent: 5764554 (1998-06-01), Monier
patent: 5777916 (1998-07-01), Monier

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